Datasheet

ADS1299
www.ti.com SBAS499A –JULY 2012–REVISED AUGUST 2012
CLOCK
The ADS1299 provides two methods for device clocking: internal and external. Internal clocking is ideally suited
for low-power, battery-powered systems. The internal oscillator is trimmed for accuracy at room temperature.
Accuracy varies over the specified temperature range; see the Electrical Characteristics. Clock selection is
controlled by the CLKSEL pin and the CLK_EN register bit.
The CLKSEL pin selects either the internal or external clock. The CLK_EN bit in the CONFIG1 register enables
and disables the oscillator clock to be output in the CLK pin. A truth table for these two pins is shown in Table 6.
The CLK_EN bit is useful when multiple devices are used in a daisy-chain configuration. During power-down, the
external clock is recommended be shut down to save power.
Table 6. CLKSEL Pin and CLK_EN Bit
CONFIG1.CLK_EN
CLKSEL PIN BIT CLOCK SOURCE CLK PIN STATUS
0 X External clock Input: external clock
1 0 Internal clock oscillator 3-state
1 1 Internal clock oscillator Output: internal clock oscillator
DATA FORMAT
The ADS1299 outputs 24 bits of data per channel in binary twos complement format, MSB first. The LSB has a
weight of [V
REF
/ (2
23
– 1)]. A positive full-scale input produces an output code of 7FFFFFh and the negative full-
scale input produces an output code of 800000h. The output clips at these codes for signals exceeding full-scale.
Table 7 summarizes the ideal output codes for different input signals. All 24 bits toggle when the analog input is
at positive or negative full-scale.
Table 7. Ideal Output Code versus Input Signal
(1)
INPUT SIGNAL, V
IN
(AINP – AINN) IDEAL OUTPUT CODE
(2)
≥ V
REF
7FFFFFh
+V
REF
/ (2
23
– 1) 000001h
0 000000h
–V
REF
/ (2
23
– 1) FFFFFFh
≤ –V
REF
(2
23
/ 2
23
– 1) 800000h
(1) Only valid for 24-bit resolution data rates.
(2) Excludes effects of noise, linearity, offset, and gain error.
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