Datasheet

ADS1294, ADS1294R

ADS1296, ADS1296R

ADS1298, ADS1298R

www.ti.com

SBAS459I –JANUARY 2010–REVISED JANUARY 2012

Lead-Off

Sample code to set dc lead-off with pull-up/pull-down resistors on all channels

WREG LOFF 0x13 // Comparator threshold at 95% and 5%, pull-up/pull-down resistor // DC lead-off

WREG CONFIG4 0x02 // Turn-on dc lead-off comparators

WREG LOFF_SENSP 0xFF // Turn on the P-side of all channels for lead-off sensing

WREG LOFF_SENSN 0xFF // Turn on the N-side of all channels for lead-off sensing

Observe the status bits of the output data stream to monitor lead-off status.

Right Leg Drive

Sample code to choose RLD as an average of the first three channels.

WREG RLD_SENSP 0x07 // Select channel 1—3 P-side for RLD sensing

WREG RLD_SENSN 0x07 // Select channel 1—3 N-side for RLD sensing

WREG CONFIG3 b’x1xx 1100 // Turn on RLD amplifier, set internal RLDREF voltage

Sample code to route the RLD_OUT signal through channel 4 N-side and measure RLD with channel 5. Make

sure the external side to the chip RLDOUT is connected to RLDIN.

WREG CONFIG3 b’xxx1 1100 // Turn on RLD amplifier, set internal RLDREF voltage, set RLD measurement bit

WREG CH4SET b’1xxx 0111 // Route RLDIN to channel 4 N-side

WREG CH5SET b’1xxx 0010 // Route RLDIN to be measured at channel 5 w.r.t RLDREF

PACE Detection

Sample code to select channel 5 and 6 outputs for PACE

WREG PACE b’0001 0101 // Power-up PACE amplifier and select channel 5 and 6 for PACE out

Product Folder Link(s): ADS1294 ADS1294R ADS1296 ADS1296R ADS1298 ADS1298R