Datasheet

ADS1294, ADS1294R

ADS1296, ADS1296R

ADS1298, ADS1298R

SBAS459I –JANUARY 2010–REVISED JANUARY 2012

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PACE DETECT

The ADS129x provide flexibility for PACE detection either in software or by external hardware. The software

approach is made possible by providing sampling rates up to 32kSPS. The external hardware approach is made

possible by bringing out the output of the PGA at two pins: TESTP_PACE_OUT1 and TESTN_PACE_OUT2.

Note that if the WCT amplifier is connected to the signal path, the user sees switching noise as a result of

chopping; see the Wilson Central Terminal (WCT) section for details.

Software Approach

To use the software approach, the device must be operated at 8kSPS or more to be able to capture the fastest

pulse. Afterwards, digital signal processing can be used to identify the presence of the pacemaker pulse. The

software approach gives the utmost flexibility to the user to be able to program the PACE detect threshold on the

fly using software. This becomes increasingly important as pacemakers evolve over time. Two parameters must

be considered while measuring fast PACE pulses:

1. The PGA bandwidth shown in Table 6.

2. For a step change in input, the digital decimation filter takes 3 × t

to settle. The PGA bandwidth determines

the gain setting that can be used and the settling time determines the data rate that the device must be

operated at.

External Hardware Approach

One of the drawbacks of using the software approach is that all channels on a single device must operate at

higher data rates. For systems where it is of concern, the ADS129x provide the option of bringing out the output

of the PGA. External hardware circuitry can be used to detect the presence of the pulse. The output of the PACE

detection logic can then be fed into the device through one of the GPIO pins. The GPIO data are transmitted

through the SPI port and loaded 2t

CLK

s before DRDY goes low. Two of the eight channels can be selected using

channels. During the differential to single-ended conversion, there is an attenuation of 0.4. Therefore, the total

gain in the PACE path is equal to (0.4 × PGA_GAIN). The PACE out signals are multiplexed with the TESTP and

TESTN signals through the TESTP_PACE_OUT1 and TESTN_PACE_OUT2 pins respectively. The channel

selection is done by setting bits[4:1] of the PACE register. If the PACE circuitry is not used, the PACE amplifiers

can be turned off using the PD_PACE bit in the PACE register.

Note that if the output of a channel connected to the WCT amplifier (for example, the V lead channels) is

connected to one of the PACE amplifiers for external PACE detection, the artifact of chopping appears at the

PACE amplifier output. Refer to the Wilson Central Terminal (WCT) section for more details.

Product Folder Link(s): ADS1294 ADS1294R ADS1296 ADS1296R ADS1298 ADS1298R