Datasheet

MUX1[2:0] = 000
RLD_SENSP[0] = 1
RLD_SENSN[0] = 1
MUX2[2:0] = 000
MUX3[2:0] = 000
MUX8[2:0] = 010
RLD_MEAS = 1
AND
PGA1
RLD_SENSP[1] = 1
RLD_SENSN[1] = 1
PGA2
RLD_SENSP[2] = 1
RLD_SENSN[2] = 1
PGA3
RLD_AMP
RLD_SENSP[7] = 0
RLD_SENSN[7] = 0
PGA8
RLD_OUT RLD_INVRLD_REFRLD_IN
Filter or
Feedthrough
ADS1298
¼
¼
IN1P
IN1N
EMI
Filter
MUX
EMI
Filter
EMI
Filter
EMI
Filter
¼
IN2N
IN3N
IN8N
IN2P
IN3P
IN8P
MUX8 010[2:0] =
1MW
(1)
1.5nF
(1)
RLDREF_INT
RLDREF_INT
(AVDD + AVSS)/2
ADS1294, ADS1294R
ADS1296, ADS1296R
ADS1298, ADS1298R
SBAS459I JANUARY 2010REVISED JANUARY 2012
www.ti.com
INPUT MULTIPLEXER (MEASURING THE RIGHT LEG DRIVE SIGNAL)
Also, the RLDOUT signal can be routed to a channel (that is not used for the calculation of RLD) for
measurement. Figure 52 shows the register settings to route the RLDIN signal to channel 8. The measurement is
done with respect to the voltage on the RLDREF pin. If RLDREF is chosen to be internal, it would be at (AVDD +
AVSS)/2. This feature is useful for debugging purposes during product development.
(1) Typical values for example only.
Figure 52. RLDOUT Signal Configured to be Read Back by Channel 8
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Product Folder Link(s): ADS1294 ADS1294R ADS1296 ADS1296R ADS1298 ADS1298R