Datasheet

START

DRDY

4f/

CLK

4f/

CLK

DataUpdating

SETTLE

ADS1294, ADS1294R

ADS1296, ADS1296R

ADS1298, ADS1298R

SBAS459I –JANUARY 2010–REVISED JANUARY 2012

www.ti.com

Single-Shot Mode

The single-shot mode is enabled by setting the SINGLE_SHOT bit in CONFIG4 register to '1'. In single-shot

mode, the ADS129x perform a single conversion when the START pin is taken high or when the START opcode

command is sent. As seen in Figure 42, when a conversion is complete, DRDY goes low and further conversions

are stopped. Regardless of whether the conversion data are read or not, DRDY remains low. To begin a new

conversion, take the START pin low and then back high for at least 2 t

CLK

s, or transmit the START opcode again.

Note that when switching from continuous mode to pulse mode, make sure the START signal is pulsed or issue

a STOP command followed by a START command.

Figure 43. DRDY with No Data Retrieval in Single-Shot Mode

This conversion mode is provided for applications that require non-standard or non-continuous data rates.

Issuing a START command or toggling the START pin high resets the digital filter, effectively dropping the data

rate by a factor of four. This mode leaves the system more susceptible to aliasing effects, thus requiring more

complex analog or digital filtering. Loading on the host processor increases because it must toggle the START

pin or send a START command to initiate a new conversion cycle.

MULTIPLE DEVICE CONFIGURATION

The ADS129x are designed to provide configuration flexibility when multiple devices are used in a system. The

serial interface typically requires four signals: DIN, DOUT, SCLK, and CS. With one additional chip select signal

per device, multiple devices can be connected together. The number of signals needed to interface n devices is

3 + n.

The right leg drive amplifiers can be daisy-chained as explained in the RLD Configuration with Multiple Devices

subsection of the ECG-Specific Functions section. To use the internal oscillator in a daisy-chain configuration,

one of the devices must be set as the master for the clock source with the internal oscillator enabled (CLKSEL

pin = 1) and the internal oscillator clock brought out of the device by setting the CLK_EN register bit to '1'. This

master device clock is used as the external clock source for the other devices.

Product Folder Link(s): ADS1294 ADS1294R ADS1296 ADS1296R ADS1298 ADS1298R