Datasheet

AVDD 0.2- -
GainV
MAX_DIFF
2
>CM>AVSS+0.2+
GainV
MAX_DIFF
2
Max(INP INN)<-
V
REF
Gain
Full-ScaleRange=
±V
REF
Gain
; =
2V
REF
Gain
−160
−150
−140
−130
−120
−110
−100
−90
−80
−70
−60
−50
−40
−30
−20
−10
0
0.001 0.01 0.1 1
Normalized Frequency (f
IN
/f
MOD
)
Power Spectral Density (dB)
G001
ADS1294, ADS1294R
ADS1296, ADS1296R
ADS1298, ADS1298R
SBAS459I –JANUARY 2010–REVISED JANUARY 2012 www.ti.com
The resistor string of the PGA that implements the gain has 120kΩ of resistance for a gain of 6. This resistance
provides a current path across the outputs of the PGA in the presence of a differential input signal. This current
is in addition to the quiescent current specified for the device in the presence of a differential signal at the input.
Input Common-Mode Range
The usable input common-mode range of the front end depends on various parameters, including the maximum
differential input signal, supply voltage, PGA gain, etc. This range is described in Equation 2:
where:
V
MAX_DIFF
= maximum differential signal at the input of the PGA
CM = common-mode range (2)
For example:
If V
DD
= 3V, gain = 6, and V
MAX_DIFF
= 350mV
Then 1.25V < CM < 1.75V
Input Differential Dynamic Range
The differential (INP – INN) signal range depends on the analog supply and reference used in the system. This
range is shown in Equation 3.
(3)
The 3V supply, with a reference of 2.4V and a gain of 6 for ECGs, is optimized for power with a differential input
signal of approximately 300mV. For higher dynamic range, a 5V supply with a reference of 4V (set by the
VREF_4V bit of the CONFIG3 register) can be used to increase the differential dynamic range.
ADC ΔΣ Modulator
Each channel of the ADS129x has a 24-bit ΔΣ ADC. This converter uses a second-order modulator optimized for
low-power applications. The modulator samples the input signal at the rate of f
MOD
= f
CLK
/4 for High-Resolution
mode and f
MOD
= f
CLK
/8 for Low-Power mode. As in the case of any ΔΣ modulator, the noise of the ADS129x is
shaped until f
MOD
/2, as shown in Figure 29. The on-chip digital decimation filters explained in the next section
can be used to filter out the noise at higher frequencies. These on-chip decimation filters also provide antialias
filtering. This feature of the ΔΣ converters drastically reduces the complexity of the analog antialiasing filters that
are typically needed with Nyquist ADCs.
Figure 29. Modulator Noise Spectrum Up To 0.5 × f
MOD
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