Datasheet

CM+1/2V
REF
+1/2V
REF
- V
REF
1/2
Single-EndedInputs
t
INP
CMVoltage
CM V-
REF
1/2
CM+1/2V
REF
DifferentialInputs
t
INP
INN
CMVoltage
CM 1/2V
REF
-
+V
REF
-V
REF
Common-ModeVoltage(DifferentialMode)=
(INP)+(INN)
2
,Common-ModeVoltage(Single-EndedMode)= INN.
INN=CMVoltage
InputRange(DifferentialMode)=(AINP AINN)=V ( V )=2V .-
REF REF
- -
REF
PgaP
R
50kW
2
R
20k
(forGain=6)
W
1
R
50kW
2
FromMuxP
PgaN
FromMuxN
ToADC
ADS1294, ADS1294R
ADS1296, ADS1296R
ADS1298, ADS1298R
www.ti.com SBAS459I –JANUARY 2010–REVISED JANUARY 2012
Figure 27. Using the ADS1298 in the Single-Ended and Differential Input Modes
PGA SETTINGS AND INPUT RANGE
The PGA is a differential input/differential output amplifier, as shown in Figure 28. It has seven gain settings (1,
2, 3, 4, 6, 8, and 12) that can be set by writing to the CHnSET register (see the CHnSET: Individual Channel
Settings subsection of the Register Map section for details). The ADS129x have CMOS inputs and hence have
negligible current noise. Table 6 shows the typical values of bandwidths for various gain settings. Note that
Table 6 shows the small-signal bandwidth. For large signals, the performance is limited by the slew rate of the
PGA.
Figure 28. PGA Implementation
Table 6. PGA Gain versus Small-Signal Bandwidth
NOMINAL BANDWIDTH AT ROOM
GAIN TEMPERATURE (kHz)
1 237
2 146
3 127
4 96
6 64
8 48
12 32
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