Datasheet

ADS1293

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SNAS602B –FEBRUARY 2013–REVISED MARCH 2013

Table 42. ERROR_SYNC: Synchronization Error

Addr BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0

0x1D SYNC_PHASEE SYNC_ SYNC_ SYNC_

RR CH3ERR CH2ERR CH1ERR

[7:4] RESERVED —

[3] SYNC_PHASEERR Clock timing generator phase error

1: Timing generator phase adjusted to comply with SYNCB signal

[2] SYNC_CH3ERR Channel 3 synchronization error

1: Channel's filter timing updated to comply with synchronization source

[1] SYNC_CH2ERR Channel 2 synchronization error

1: Channel's filter timing updated to comply with synchronization source

[0] SYNC_CH1ERR Channel 1 synchronization error

1: Channel's filter timing updated to comply with synchronization source

Table 43. ERROR_MISC: Miscellaneous Error

Addr BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0

0x1E BATLOW_ RLDRAIL_ CMOR_

STATUS STATUS STATUS

[7:3] RESERVED —

[2] BATLOW_STATUS Low battery error status

1: Indicates the battery voltage has dropped below 2.7 V

[1] RLDRAIL_STATUS Right leg drive near rail error status

1: Indicates the right leg drive amplifier output is approaching the supply rails

[0] CMOR_STATUS Common-mode level out-of-range error status

1: Indicates the level detected by the common-mode detect block is outside of the input common-

mode range of the amplifiers in the analog front-end

Note: The clock to digital (internal or external) must be enabled in 0x12[2] for this error register to update.

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