Datasheet

ADS1293
SNAS602B –FEBRUARY 2013–REVISED MARCH 2013 www.ti.com
Power Management
The ADS1293 has many features that allow the optimization of power consumption. The common-mode detector
and right leg drive amplifier can be configured to achieve the optimum AC performance to power consumption
ratio in a given application environment. Almost all internal circuit blocks can be powered down to reduce power
consumption. Table 13 lists the typical power consumption budget for all of the circuit blocks that can be
individually powered down.
There are two master control bits, PWR_DOWN and STANDBY, in addition to the power down control bits that
are used to power down an individual circuit block, and they are located in the CONFIG register. In the power
down mode, all circuits that can be powered down are powered down, irrespective of the state of their individual
shutdown bits. With the PWR_DOWN bit, the entire ADS1293 can be quickly placed in its minimal current
consumption state without needing to do many individual configuration register writes. The STANDBY bit
operates in a similar manner, but it does not affect the state of the three voltage generators and the crystal
oscillator inside the ADS1293, which require a somewhat longer time to start up. When placing the ADS1293 in
stand-by mode, the power consumption is somewhat higher than in the power down state but the ADS1293 can
return to operation quicker. The difference between the current consumption in power-down and in stand-by
depends on the logic state of the shutdown bits of the two reference voltage generators and the crystal oscillator,
as described in Table 13.
Table 13 specifies the current consumption of the blocks that are always ON in the first row. The second group in
the table specifies the current consumption of the two reference voltage generators and the crystal oscillator that
are OFF in power-down mode but that remain active during stand-by mode. The last group of circuit blocks in the
table specifies the current consumption of the other circuit blocks. The ADS1293 will need about 100ms to return
to operation after being powered down. The time to recover from stand-by is limited by the time latency of the
programmable logic filters in the AFE channels, as described in the Filter Settling Time section.
Table 13. Typical Current Consumption per Block
GLOBAL POWER
CURRENT
BLOCK NAME CONDITIONS / NOTES
µA
CONTROL
Always on Supporting circuitry 80
Reference voltage generator 17
Off in power down Right leg drive reference 9
Crystal oscillator 7
low power, per channel 38
Instrumentation amplifier
high resolution, per channel 121
Analog front end fault detect Per channel 2
102.4kHz, per channel 22
Sigma delta modulator
204.8kHz, per channel 41
Analog output channel 29
Off in standby
Lead-off detect Excluding excitation currents 25
Wilson reference per channel 7
low speed, cap drive 1, 6 active leads 39
Common-mode detector
high speed, cap drive 4, 6 active leads 79
low speed, cap drive 1 20
Right leg drive amplifier
high speed, cap drive 4 60
38 Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: ADS1293