Datasheet

ADS1293
SNAS602B –FEBRUARY 2013–REVISED MARCH 2013 www.ti.com
the supply rails. The flag goes high when the output voltage of the common-mode detector is 200mV
away from either supply rail. This condition would occur if the common-mode on the patient’s body is far
away from the target value and as a result the right leg drive amplifier needs to deliver a lot of charge to
the patient’s body to restore the common-mode voltage. In this scenario, the common-mode may still be
inside the range of the instrumentation amplifier and the ECG signal may still be accurately acquired.
– CMOR: The CMOR error flag is raised when the output voltage of the common-mode detector is 750mV
away from either supply rail. In this case, the common-mode voltage detected on the patient’s body is
outside of the input CMVR where the instrumentation amplifier can process the full differential input signal
(see Instrumentation Amplifier (INA)). When this flag is raised, the ECG signal accuracy may be lost.
3. ERROR_RANGE1, ERROR_RANGE2, ERROR_RANGE3: These registers contain the out-of-range error
signals of the AFEs in the three channels. The flags in these registers are described in Instrumentation
Amplifier Fault Detection and in Sigma-Delta Modulator Fault Detection.
4. ERROR_SYNC: This register contains flags that indicate certain synchronization errors have been detected.
These errors have been described in Synchronization Errors .
5. ERROR_MISC: This register contains status flags for common-mode out-of-range, right leg drive near rail
and low battery errors.
Error Filtering
The alarms that are generated by the analog circuitry inside the ADS1293 are filtered by digital logic. Alarms will
only be accepted if they are active for a number of consecutive digital clock cycles, which toggle on the falling
edge of the 409.6kHz oscillator clock. The number of digital clock cycles that an alarm will have to be active
before it is accepted is programmable between 1 and 16 counts using the ALARM_FILTER register. This register
contains two separate filter parameters. The 4 LSBs in this register program the filtering of the lead-off detect
error bits. The 4 MSBs program the filtering of the instrumentation amplifier signal out-of-range errors, the sigma-
delta input over range errors, and the CMOR, RLDRAIL and BATLOW errors.
ALARMB Pin and Error Masking
The ADS1293 has an ALARMB output pin. This open drain output will go low when a new alarm condition occurs
in the ERROR_STATUS register. The ALARMB pin can be used as an interrupt signal to a microcontroller to
warn about error conditions that can potentially corrupt the data that is being collected so that the microcontroller
can take appropriate preventive action. The functionality of the ALARMB pin is flexible and programmable using
the MASK_ERR register. This register allows masking some of the errors in the ERROR_STATUS register so
that certain alarm events will not trigger a high to low transition on the ALARMB pin.
Error Register Automatic Clearing Description
All error bits in the registers 0x18 through 0x1E are latched in a high state when an error occurs and will only
return to zero after being read. The error bits will remember an error until the user reads the error. The sign bits
in the CH1ERR, CH2ERR and CHR3ERR registers are latched on low to high transition of the DIF_HIGH
transitions in the corresponding registers. In this way, when the differential signal goes out-of-range, the sign of
the signal can also be detected when the alarm register is read. Upon read, the error bits will be cleared. If the
error condition has disappeared before the error is read, the error bits will remain low after being read. For all
error registers, except ERROR_STATUS, the error bits will return to their high state within a few internal clock
cycles if the error condition is still present after a register read. The bits in the ERROR_STATUS register only
respond to new errors. If an error persists after the ERROR_STATUS register is read, the error condition will not
be reflected in the error status register and the ALARMB pin will not pulse low again.
Alarm Propagation
Figure 31 shows how the alarms propagate through the digital circuitry inside the ADS1293. The errors
propagate from left to right. Synchronization errors are not filtered because they are generated synchronously
inside the digital circuitry, and if they occur, they are latched in the ERROR_SYNC register. Lead-off detect
errors are filtered by a counter programmed in the 4 LSBs of the ALARM_FILTER register and are latched in the
ERROR_LOD register. The instrumentation amplifier out-of-range, sigma-delta over range, right leg drive
amplifier out-of-range, common-mode amplifier out-of-range and low battery signals are also filtered by a counter
programmed in the MSBs of the ALARM_FILTER register. The out-of-range signals for the 3 channels are
latched in the ERROR_RANGE1, ERROR_RANGE2 and ERROR_RANGE3 registers. The first 6 registers on
the right hand side of the circuit latch errors until the error is being read. After being read, the error bit will be
36 Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: ADS1293