Datasheet

ADS1293

SNAS602B –FEBRUARY 2013–REVISED MARCH 2013

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Figure 23. Simplified DC Lead-off Detect Block Diagram

For the selected input pins, a Schmitt-trigger comparator then compares the voltage that appears on the pin to

(VDD-0.5V). The result of this comparison can be accessed through the corresponding OUT_LOD[x] bit of the

ERROR_LOD register. If a lead is off, then the injected current has no return path to ground, and as a result, the

voltage on the associated input pin will rise towards VDD. This is detected by the comparator and is used as a

signal to indicates the lead is not properly connected.

It is important to note that the lead-off detection circuit requires a low impedance return path from the right leg

electrode to ground, such as a voltage reference or the RLD amplifier output. Without a proper low impedance

return path for the LOD currents, all enabled LOD pins will report a lead disconnected.

Analog AC Lead-Off Detect

DC lead-off detection cannot be used when using capacitively coupled electrodes, such as dry electrodes,

because they have a high DC impedance that will block DC test currents. In this case, the analog AC LOD block

can be used. Contrary to the DC LOD, the AC LOD injects AC excitation currents with programmable amplitudes

and frequencies into the desired lead.

To operate the LOD in analog AC LOD mode, the SELAC_LOD and the ACAD_LOD bits of the LOD_CN register

must be set to 1.

A simplified block diagram of the analog AC LOD block is shown in Figure 25. The AC excitation frequency can

be programmed by a 7-bit number, ACDIV_LOD, and a division factor, ACDIV_FACTOR, in the LOD_AC_CN

Φ = 50/(4 × K × (ACDIV_LOD + 1)) kHz (13)

Where K is 1 if the ACDIV_FACTOR bit equals 0, and K is 16 if the ACDIV_FACTOR bit equals 1. For instance,

ACDIV_LOD = 0 and ACDIV_FACTOR = 0 result in an excitation frequency of 12.5kHz, which is the maximum

excitation frequency.

Complimentary driven switches, enabled by the EN_LOD[x] bits of the LOD_EN register, sink and source the AC

excitation currents into the desired input pins. The resulting AC current has a frequency Φ and a peak-to-peak

amplitude equal to the current programmed into the DAC. An AC coupled synchronous detector detects the

amplitude of the AC voltage appearing on the lead. The detected amplitude is compared to a reference voltage

by means of a Schmitt-trigger comparator. The comparator’s reference voltage level, as shown in Figure 24, is

determined by a 2-bit reference DAC configured in the ACLVL_LOD bits of the LOD_CN register.

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