Datasheet

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ADS1293
www.ti.com
SNAS602B FEBRUARY 2013REVISED MARCH 2013
Analog Front End
The ADS1293 contains three analog front ends that convert a differential analog voltage into a digital signal.
Each analog front end consists of an instrumentation amplifier (INA), a sigma-delta modulator (SDM), and a
digital filter.
Instrumentation Amplifier (INA)
The instrumentation amplifier provides a high input impedance to interface with signal sources that may have
relatively high output impedance, such as ECG electrodes. The maximum differential input voltage range of the
Sigma-Delta Modulator (SDM) behind the INA is ±1.4V, and the gain of the INA is 3.5x. Therefore, the maximum
differential input voltage of the INA is ±400mV.
The input common-mode voltage range (CMVR) of the INA is 0.95V to VDD-0.95V. If the input differential voltage
range is limited to smaller values, then the CMVR can be somewhat extended. If the differential input signal is
limited to VIN
MAX
, the CMVR range can be defined as:
(4)
The INA can be configured to operate in a low-power mode or in a high-resolution mode. The low-power mode
consumes about 3 times less power than the high-resolution mode. However, the high-resolution mode has less
noise than the low-power mode. Switching between these two modes is controlled by the EN_HIRES_CHx bits in
the AFE_RES register.
When a channel is not in use, its INA can be shut down by programming the SHDN_INA_CHx bit in the
AFE_SHDN_CN register, and its SDM can also be shut down by programming the SHDN_SDM_CHx bit in the
AFE_SHDN_CN register.
Instrumentation Amplifier Fault Detection
The output signal of the instrumentation amplifier can be monitored to ensure its output signal is within an
appropriate range. The out-of-range error flags for the INAs can be observed in the ERROR_RANGE1,
ERROR_RANGE2 and ERROR_RANGE3 registers.
The output signal is present at two points: OUTP and OUTN. If the input common-mode voltage or differential
voltage is such that the instrumentation amplifier would have to drive the voltages at these points above the
positive or below the negative supply rail, then the signal accuracy would be lost. These two points are monitored
and a warning flag is raised if the voltage on these pins approaches the supply rails. If the OUTP_HIGH flag is
raised, then the voltage at OUTP is close to the positive rail. This indicates the differential input signal is too
large or the input common-mode voltage is too high. If the OUTP_LOW flag is raised, then the voltage at OUTP
is close to the negative rail. This happens at low input common-mode voltages and large negative differential
input voltages. Similar reasoning holds for the OUTN_HIGH and OUTN_LOW flags.
The differential output voltage of the INA is monitored and reported to the DIF_HIGH bit. This error flag indicates
that the differential signal is out-of-range and is no longer an accurate representation of the input signal. The
DIF_HIGH error flag is raised if the differential output voltage of the INA exceeds ±1.4V, which is the input range
of the Delta-Sigma Modulator. When this happens, the SDM will no longer sample the output of the INA, but
instead will sample 0V. The sign of the input signal can still be observed in the SIGN bit of the ERROR_RANGEx
registers.
The fault detection circuitry for OUTP_HIGH, OUTP_LOW, OUTN_HIGH and OUTN_LOW can be shut down by
programming the SHDN_FAULTDET_CHx bits in the AFE_FAULT_CN register. These shutdown bits do not
affect the operation of DIF_HIGH and SIGN because the instrumentation amplifier should always provide these
signals to the sigma-delta modulator. The circuitry that generates DIF_HIGH and SIGN only gets shut down
when the corresponding INA is shut down.
Sigma-Delta Modulator (SDM)
The Sigma-Delta Modulator (SDM) takes the output signal of the INA and converts this signal into a high
resolution bit stream that is further processed by the digital filters.
The SDM can operate at clock frequencies of 102.4kHz or 204.8kHz; these frequencies are generated internally.
Running the SDM at 204.8kHz results in a larger oversampling ratio, which improves the resolution of the signal
recovered by the digital filters behind the SDM. However, running the SDM at a higher clock frequency will
increase its power consumption, resulting in a trade-off between resolution and power consumption.
Copyright © 2013, Texas Instruments Incorporated 15
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