Datasheet

IN3
IN4
IN1
IN2
IN5
IN6
POSx
CALx=11
NEGx
INP_CHx
INN_CHx
VDD
CVREF
TSTx=10
TSTx=01
VREFP
VREFN
VBAT_MONI_CHx
ADS1293
www.ti.com SNAS602B –FEBRUARY 2013–REVISED MARCH 2013
FUNCTIONAL DESCRIPTION
The ADS1293 is a fully integrated signal chain for ECG applications. It features three low-power, 24-bit resolution
channels for ECG and pace monitoring and an auxiliary fourth channel for analog pace detection. In addition, the
ADS1293 features AC and DC lead-off detection, right leg drive capability, and Wilson and Goldberger terminals.
Each of the three channels is synchronized and provides digital filtering with a cut-off frequency that is
programmable from 5Hz to 1280Hz. Each channel filter can be set independently while maintaining
synchronization. In addition, a lower resolution output is provided for each signal channel with a cut-off frequency
programmable between 650Hz to 2.6kHz. These output signals are ideal for sensing a pace-maker signal. Each
channel provides enough dynamic range to handle electrode offset and motion artifacts without sacrificing
resolution. Each input has built-in EMI rejection that eliminates noise from RF transmitters.
Flexible Routing Switch
The flexible routing switch can connect the inputs of the three analog front end channels as well as the inputs of
the analog pace channel to any of the 6 input pins. This allows system flexibility and even on-the-fly
reconfiguration of the ECG monitoring system. For test purposes, the flexible routing switch can short the
differential input pins of a channel or connect a differential reference signal to the input of a channel. This
reference voltage can be applied with both positive and negative polarity. This feature allows to measure relative
mismatches between channels, such as offset and gain mismatches. Additionally, there is an option to route a
fraction of the battery voltage (the voltage source connected to the VDD pin) to an input channel. This allows the
ADS1293 to monitor the state of charge of the battery.
The switch path inside the flexible routing switch is illustrated in Figure 17. The figure shows the switch path for a
single channel. All channels are completely identical. The switches are controlled by the registers
FLEX_CH1_CN, FLEX_CH2_CN, FLEX_CH3_CN, and FLEX_VBAT_CN, which are described in the Input
Channel Selection Registers.
Figure 17. Flexible Routing Switch for Channel 1
It should be noted that the switches that control the input selection for the analog front end channels have a
certain priority. If the battery voltage monitoring mode is enabled by programming the VBAT_MONI_CHx bit in
the FLEX_VBAT_CN register, then the POSx and NEGx bits programmed in the FLEX_CHx_CN register no
longer have any effect. The battery voltage monitoring mode thus takes priority; this is shown in the first row of
Table 3. Furthermore, the test features take second priority over the input pin selection. If the TSTx bit of the
FLEX_CHx_CN register are not zero, then the POSx and NEGx bits are essentially ignored, and the test features
will take priority as seen in Table 3. The TSTx, POSx, and NEGx bits are described in the Input Channel
Selection Registers.
Copyright © 2013, Texas Instruments Incorporated 13
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