Datasheet

ADS1291
ADS1292
ADS1292R
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SBAS502B DECEMBER 2011REVISED SEPTEMBER 2012
SPI COMMAND DEFINITIONS
The ADS1291, ADS1292, and ADS1292R provide flexible configuration control. The opcode commands
summarized in Table 13 control and configure the ADS1291, ADS1292, and ADS1292R operation. The opcode
commands are stand-alone, except for the register read and register write operations that require a second
command byte plus data. CS can be taken high or held low between opcode commands but must stay low for
the entire command operation (especially for multi-byte commands). System opcode commands and the RDATA
command are decoded by the ADS1291, ADS1292, and ADS1292R on the seventh SCLK falling edge. The
register read and write opcodes are decoded on the eighth SCLK falling edge. Be sure to follow SPI timing
requirements when pulling CS high after issuing a command.
Table 13. Command Definitions
COMMAND DESCRIPTION FIRST BYTE SECOND BYTE
System Commands
WAKEUP Wake-up from standby mode 0000 0010 (02h)
STANDBY Enter standby mode 0000 0100 (04h)
RESET Reset the device 0000 0110 (06h)
START Start or restart (synchronize) conversions 0000 1000 (08h)
STOP Stop conversion 0000 1010 (0Ah)
OFFSETCAL Channel offset calibration 0001 1010 (1Ah)
Data Read Commands
Enable Read Data Continuous mode.
RDATAC 0001 0000 (10h)
This mode is the default mode at power-up.
(1)
SDATAC Stop Read Data Continuously mode 0001 0001 (11h)
RDATA Read data by command; supports multiple read back. 0001 0010 (12h)
Register Read Commands
RREG Read n nnnn registers starting at address r rrrr 001r rrrr (2xh)
(2)
000n nnnn
(2)
WREG Write n nnnn registers starting at address r rrrr 010r rrrr (4xh)
(2)
000n nnnn
(2)
(1) When in RDATAC mode, the RREG command is ignored.
(2) n nnnn = number of registers to be read or written – 1. For example, to read or write three registers, set n nnnn = 0 (0010). r rrrr =
starting register address for read and write opcodes.
WAKEUP: Exit STANDBY Mode
This opcode exits the low-power standby mode; see the STANDBY: Enter STANDBY Mode subsection of the
SPI Command Definitions section. Time is required when exiting standby mode (see the Electrical
Characteristics for details). There are no restrictions on the SCLK rate for this command and it can be
issued any time. Any following command must be sent after 4 t
CLK
cycles.
STANDBY: Enter STANDBY Mode
This opcode command enters the low-power standby mode. All parts of the circuit are shut down except for the
reference section. The standby mode power consumption is specified in the Electrical Characteristics. There are
no restrictions on the SCLK rate for this command and it can be issued any time. Do not send any other
command other than the wakeup command after the device enters the standby mode.
RESET: Reset Registers to Default Values
This command resets the digital filter cycle and returns all register settings to the default values. See the Reset
(RESET) subsection of the SPI Interface section for more details. There are no restrictions on the SCLK rate
for this command and it can be issued any time. It takes 9 f
MOD
cycles to execute the RESET command.
Avoid sending any commands during this time.
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Product Folder Links: ADS1291 ADS1292 ADS1292R