Datasheet

1 Fm
To ADC Reference Inputs
VCAP1
10 Fm
VREFP
VREFN
Bandgap
2.42 V or
4.033 V
AVSS
R
1
(1)
R
3
(1)
R
2
(1)
0.1 Fm
10
10
30
50
70
90
110
130
-
-
-
-
-
-
-
Normalized Frequency (f /f )
IN MOD
Gain (dB)
0.50 41 1.5 2 2.5 3 3.5
DR[2:0] = 000DR[2:0] = 110
ADS1291
ADS1292
ADS1292R
www.ti.com
SBAS502B DECEMBER 2011REVISED SEPTEMBER 2012
Figure 30. Transfer Function of On-Chip Decimation Filters
Until 4f
MOD
for DR[2:0] = 000 and DR[2:0] = 110
REFERENCE
Figure 31 shows a simplified block diagram of the ADS1291, ADS1292, and ADS1292R internal reference. The
reference voltage is generated with respect to AVSS. The VREFN pin must always be connected to AVSS.
(1) For V
REF
= 2.42 V: R
1
= 100 kΩ, R
2
= 200 kΩ, and R
3
= 200 kΩ. For V
REF
= 4.033 V: R
1
= 84 kΩ, R
2
= 120 kΩ, and R
3
= 280 kΩ.
Figure 31. Internal Reference
The external band-limiting capacitors determine the amount of reference noise contribution. For high-end ECG
systems, the capacitor values should be chosen such that the bandwidth is limited to less than 10 Hz so that the
reference noise does not dominate the system noise. When using a 3-V analog supply, the internal reference
must be set to 2.42 V. In case of a 5-V analog supply, the internal reference can be set to 4.033 V by setting the
VREF_4V bit in the CONFIG2 register.
Alternatively, the internal reference buffer can be powered down and VREFP can be applied externally. Figure 32
shows a typical external reference drive circuitry. Power-down is controlled by the PD_REFBUF bit in the
CONFIG2 register. This power-down is also used to share internal references when two devices are cascaded.
By default the device wakes up in external reference mode.
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