Datasheet

FinalOutputData=(Input OFC[2:0])- ´
FSC[2:0]
400000h
Modulator
AINP
AINN
Digital
Filter
S
OFC
Register
FinalOutput
OutputData
Clippedto32Bits
´
+
-
FSCRegister
400000h
ADS1281
www.ti.com SBAS378D –AUGUST 2007–REVISED JUNE 2010
Table 17. Offset Calibration Values
OFFSET AND FULL-SCALE CALIBRATION
REGISTERS
OFC REGISTER FINAL OUTPUT CODE
(1)
7FFFFFh 80000000h
The conversion data can be scaled for offset and gain
before yielding the final output code. As shown in
000001h FFFFFF00h
Figure 50, the output of the digital filter is first
000000h 00000000h
subtracted by the offset register (OFC) and then
FFFFFFh 00000100h
multiplied by the full-scale register (FSC). Equation 7
800000h 7FFFFF00h
shows the scaling:
(1) Full 32-bit final output code with zero code input.
FSC[2:0] Registers
(7)
The full-scale calibration is a 24-bit word, composed
The values of the offset and full-scale registers are
of three 8-bit registers, as shown in Table 20. The
set by writing to them directly, or they are set
full-scale calibration value is 24-bit, straight offset
automatically by calibration commands.
binary, normalized to 1.0 at code 400000h. Table 18
summarizes the scaling of the full-scale register. A
OFC[2:0] Registers
register value of 400000h (default value) has no gain
The offset calibration is a 24-bit word, composed of
correction (gain = 1). Note that while the gain
three 8-bit registers, as shown in Table 19. The offset
calibration register value corrects gain errors above 1
register is left-justified to align with the 32-bits of
(gain correction < 1), the full-scale range of the
conversion data. The offset is in twos complement
analog inputs should not exceed 103% to avoid input
format with a maximum positive value of 7FFFFFh
overload.
and a maximum negative value of 800000h. This
value is subtracted from the conversion data. A
Table 18. Full-Scale Calibration Register Values
register value of 00000h has no offset correction
FSC REGISTER GAIN CORRECTION
(default value). Note that while the offset calibration
800000h 2.0
register value can correct offsets ranging from –FS to
400000h 1.0
+FS (as shown in Table 17), to avoid input overload,
the analog inputs cannot exceed the full-scale range.
200000h 0.5
000000h 0
Figure 50. Calibration Block Diagram
Table 19. Offset Calibration Word
REGISTER BYTE BIT ORDER
OFC0 LSB B7 B6 B5 B4 B3 B2 B1 B0 (LSB)
OFC1 MID B15 B14 B13 B12 B11 B10 B9 B8
OFC2 MSB B23 (MSB) B22 B21 B20 B19 B18 B17 B16
Table 20. Full-Scale Calibration Word
REGISTER BYTE BIT ORDER
FSC0 LSB B7 B6 B5 B4 B3 B2 B1 B0 (LSB)
FSC1 MID B15 B14 B13 B12 B11 B10 B9 B8
FSC2 MSB B23 (MSB) B22 B21 B20 B19 B18 B17 B16
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