Datasheet
ADS1274
ADS1278
www.ti.com
SBAS367F –JUNE 2007– REVISED FEBRUARY 2011
ELECTRICAL CHARACTERISTICS
All specifications at T
A
= –40°C to +105°C, AVDD = +5V, DVDD = +1.8V, IOVDD = +3.3V, f
CLK
= 27MHz, VREFP = 2.5V,
VREFN = 0V, and all channels active, unless otherwise noted.
ADS1274, ADS1278
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ANALOG INPUTS
Full-scale input voltage (FSR
(1)
) V
IN
= (AINP – AINN) ±V
REF
V
Absolute input voltage AINP or AINN to AGND AGND – 0.1 AVDD + 0.1 V
Common-mode input voltage (V
CM
) V
CM
= (AINP + AINN)/2 2.5 V
High-Speed mode 14 kΩ
High-Resolution mode 14 kΩ
Differential input impedance
Low-Power mode 28 kΩ
Low-Speed mode 140 kΩ
DC PERFORMANCE
Resolution No missing codes 24 Bits
f
CLK
= 37MHz 144,531 SPS
(3)
High-Speed mode
(2)
f
CLK
= 32.768MHz 128,000 SPS
f
CLK
= 27MHz 105,469 SPS
Data rate (f
DATA
)
High-Resolution mode 52,734 SPS
Low-Power mode 52,734 SPS
Low-Speed mode 10,547 SPS
Integral nonlinearity (INL)
(4)
Differential input, V
CM
= 2.5V ±0.0003 ±0.0012 % FSR
(1)
Offset error 0.25 2 mV
Offset drift 0.8 μV/°C
Gain error 0.1 0.5 % FSR
Gain drift 1.3 ppm/°C
High-Speed mode Shorted input 8.5 16 μV, rms
High-Resolution mode Shorted input 5.5 12 μV, rms
Noise
Low-Power mode Shorted input 8.5 16 μV, rms
Low-Speed mode Shorted input 8.0 16 μV, rms
Common-mode rejection f
CM
= 60Hz 90 108 dB
AVDD 80 dB
Power-supply rejection DVDD f
PS
= 60Hz 85 dB
IOVDD 105 dB
V
COM
output voltage No load AVDD/2 V
(1) FSR = full-scale range = 2V
REF
.
(2) f
CLK
= 37MHz max for High-Speed mode, and 27MHz max for all other modes. See Table 7 for f
CLK
restrictions in High-Speed mode.
(3) SPS = samples per second.
(4) Best fit method.
© 2007–2011, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Link(s): ADS1274 ADS1278