Datasheet

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SBAS306F − NOVEMBER 2004 − REVISED OCTOBER 2007
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15
OVERVIEW
The ADS1271 is a 24-bit, delta-sigma ADC. It offers the
combination of outstanding DC accuracy and superior AC
performance. Figure 43 shows the block diagram for the
ADS1271. The ADS1271 converter is comprised of an
advanced, 6th-order, chopper-stabilized, delta-sigma
modulator followed by a low-ripple, linear phase FIR filter.
The modulator measures the differential input signal,
V
IN
= (AINP – AINN), against the differential reference,
V
REF
= (VREFP – VREFN). The digital filter receives the
modulator signal and provides a low-noise digital output.
To allow tradeoffs among speed, resolution, and power,
three modes of operation are supported on the ADS1271:
High-Speed, High-Resolution, and Low-Power. Table 1
summarizes the performance of each mode.
In High-Speed mode, the data rate is 105kSPS; in
High-Resolution mode, the SNR = 109dB; and in
Low-Power mode, the power dissipation is only 35mW.
The digital filter can be bypassed, enabling direct access
to the modulator output.
The ADS1271 is configured by simply setting the
appropriate IO pins—there are no registers to program.
Data is retrieved over a serial interface that supports both
SPI and Frame-Sync formats. The ADS1271 has a
daisy-chainable output and the ability to synchronize
externally, so it can be used conveniently in multichannel
systems.
∆Σ
Modulator
Digital
Filter
VREFP
V
REF
V
IN
VREFN
Σ
Σ
DRDY/FSYNC
SCLK
DOUT
DIN
FORMAT
SYNC/PDWN
MODE
CLK
SPI
or
Frame−
Sync
Serial
Interface
AINP
AINN
Figure 43. Block Diagram
Table 1. Operating Mode Performance Summary
MODE DATA RATE (SPS) PASSBAND (Hz) SNR (dB) NOISE (µV
RMS
) POWER (mW)
High-Speed 105,469 47,777 106 9.0 92
High-Resolution 52,734 23,889 109 6.5 90
Low-Power 52,734 23,889 106 9.0 35