Datasheet

AINP
AINN
RESETPWDN/
START
SYNCOUT
CS
SCLK
DIN
DOUT
DRDY
AVDD
AVSS
VREFN
VREFP
REFOUT
DVDD
DGND
BYPASS
XTAL2
XTAL1/CLKIN
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
ADS1259
20 to50W W
20W to50W
10nF
(2)
(+)
( )-
ControllerI/O
ControllerSPIPort
ControllerI/O
+
1 Fm
1 Fm
1 Fm
+3.3V
-2.5V
+2.5V
SignalInput
1 Fm
1 Fm
(1)
1MW
DrivesthePGA280
SYNCINPin
+
1 Fm
+
2.5V
ReferenceOutput
-
+
4.7kW
1MW
ADS1259
www.ti.com SBAS424D –JUNE 2009– REVISED AUGUST 2011
BASIC CONNECTION
The ADS1259 basic connections are shown in Figure 64. The diagram shows the ADS1259 operating with an
internal oscillator and with internal reference. Dual ±2.5V analog power supplies are also shown. Pins 6-9 are the
SPI port connection. The remaining digital I/O pins connect to the controller I/O. Note that the minimum
configuration of the digital I/O may include only SCLK, DIN, and DOUT.
(1) It is recommended to buffer the ADS1259 inputs. The output isolation resistors may be incorporated within the amplifier feedback loop.
(2) Low distortion C0G or film capacitor recommended.
Figure 64. ADS1259 Basic Connection Diagram
LAYOUT
Place the input buffer and input decoupling capacitors close to the ADS1259 inputs. The bypass capacitors for
power-supply and reference decoupling should also be placed close to the device. In some cases, it may be
necessary to use a split ground plane in which digital return currents of external components are routed away
from the ADS1259. In this case, connect the grounds at the power supply.
CONFIGURATION GUIDE
Configuration of the ADS1259 involves configuring the device hardware (power supply, I/O pins, etc) and device
register settings. The registers are configured by commands sent via the device SPI port.
Power Supplies
The ADS1259 analog section operates either with a single +5V or dual ±2.5V supplies. The digital section
operates from +2.7V to +5V. The digital and analog power supplies may be tied together (+5V only).
Reference
Select either the internal reference or an external reference for the ADS1259 (see the Reference section). The
default is external reference. Figure 64 depicts the internal reference connection.
Clock
Choose the desired clock source (see the Clock Source section). Figure 64 depicts the internal clock operation.
Copyright © 2009–2011, Texas Instruments Incorporated 39