Datasheet

t
SAMPLE MOD
=1/f
ON
OFF
S
1
S
2
OFF
ON
S
1
S
1
AVSS+2.5V
R =R ||2R =120k
R =R =500k
W
W
COM EFFA
DIFF EFFB EFFA
AVSS+2.5V
R =500kW
EFFA
R =130kW
EFFB
(f =0.9216MHz)
MOD
R =500kW
EFFA
AINN
AINP
C =2pF
A1
C =8pF
B
C =2pF
A2
S
2
AVSS+2.5V
S
2
AVSS+2.5V
AINN
AINP
Equivalent
Circuit
AVDD
AVSS
R =
EFF
f C´
MOD X
1
ESDDiodes
ESDDiodes
andf =f /8
CLKMOD
ADS1259
www.ti.com SBAS424D –JUNE 2009– REVISED AUGUST 2011
ANALOG INPUTS (AINP, AINN) ESD diodes protect the analog inputs. To keep these
diodes from turning on, make sure the voltages on
The ADS1259 measures the differential input signal
the input pins do not go below AVSS by more than
V
IN
= (AINP – AINN) against the differential reference
300mV, and likewise do not exceed AVDD by more
V
REF
= (VREFP – VREFN) using internal capacitors
than 300mV.
that are continuously charged and discharged.
Figure 37 shows the simplified schematic of the ADC AVSS – 300mV < (AINP or AINN) < AVDD + 300mV.
input circuitry; the right side of the figure illustrates
Note that the valid input range is:
the input circuitry with the capacitors and switches
replaced by an equivalent circuit. Figure 36
AVSS – 100mV < (AINP or AINN) < AVDD + 100mV
demonstrates the ON/OFF timings for the switches of
Figure 37.
In Figure 37, S
1
switches close during the input
sampling phase. With switch S
1
closed, C
A1
charges
to AINP, C
A2
charges to AINN, and C
B
charges to
(AINP – AINN). For the discharge phase, S
1
opens
first and then S
2
closes. C
A1
and C
A2
discharge to
approximately to AVSS + 2.5V and C
B
discharges to
0V. This two-phase sample/discharge cycle repeats
Figure 36. S
1
and S
2
Switch Timing for Figure 37
with a period of t
SAMPLE
= 1/f
MOD
. f
MOD
is the operating
frequency of the modulator, where f
MOD
= f
CLK
/8.
Although optimized for differential signals, the
The charging of the input sampling capacitors draws
ADS1259 inputs may be driven with a single-ended
a transient current from the source driving the
signal by fixing one input to AVSS or mid-supply. Full
ADS1259 ADC inputs. The average value of this
dynamic range is achieved when the inputs are
current can be used to calculate an effective
differentially driven ±V
REF
.
impedance (R
EFF
) where R
EFF
= V
IN
/I
AVERAGE
. These
impedances scale inversely with f
MOD
. For example, if
As a result of the switched-capacitor input structure of
f
MOD
is reduced by a factor of two, the impedances
the ADS1259, a buffer is recommended to drive the
double. Note that the sampling capacitors can vary
analog inputs. An input filter comprised of 20Ω to 50Ω
±15% over production lots and typically vary 1% with
resistors and 10nF capacitors should be used
temperature. The variations of the sampling
between the buffer and the ADS1259 inputs.
capacitors have a corresponding effect on the analog
input impedance.
Figure 37. Simplified ADC Input Structure
Copyright © 2009–2011, Texas Instruments Incorporated 15