Datasheet
CS
SCLK
DIN Command Byte 1 Don’t Care Don’t Care
(1)
DOUT
(1) After the prescribed number of registers are read, then one or more additional commands can be issued in succession.
(2) Four bytes for channel data register read. See Table 13, Status Byte. One or more bytes for register data read, depending on MUL bit.
NOTE:
Don’t Care Data
(2)
Data
(2)
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8
ADS1258-EP
SBAS445D –MARCH 2009– REVISED MARCH 2011
www.ti.com
COMMAND DESCRIPTION SCLK falling edge (command byte completed), the
MSB of the channel data is restarted on DOUT. The
Commands may be sent to the ADS1258 with CS tied
user clocks the data on the following rising edge of
low. However, after the Channel Data Read Direct
SCLK. A total of 40 SCLK transitions complete the
operation, it is necessary to toggle CS or an SPI
data read operation. Unlike the direct read mode, the
timeout must occur to reset the interface before
channel data can be read during a DRDY transition
sending a command.
without data corruption. This mode is recommended
when DRDY is not used and the data is polled to
Channel Data Read Command
detect for the occurrence of new data or when CS is
tied low to avoid the necessity for an SPI timeout that
To read channel data in this mode (register format),
otherwise occurs when reading data directly. This
the first three bits of the command byte to be shifted
option avoids conflicts with DRDY, as shown in
into the device are 001. The MUL bit must be set
Figure 59.
because this command is a multiple byte read. The
remaining bits are don’t care but still must be clocked
to the device. During this time, ignore any data that
appear on DOUT until the command completes. This
data should be ignored. Beginning with the eighth
Figure 59. Register and Channel Data (Register Format) Read
32 Submit Documentation Feedback Copyright © 2009–2011, Texas Instruments Incorporated
Product Folder Link(s): ADS1258-EP