Datasheet

ADS1255
ADS1256
SBAS288K − JUNE 2003 − REVISED SEPTEMBER 2013
www.ti.com
17
The charging of the input capacitors draws a transient
current from the sensor driving the ADS1255/6 inputs. The
average value of this current can be used to calculate an
effective impedance Zeff where Zeff = V
IN
/ I
AVERAGE
.
Figure 11 shows the input circuitry with the capacitors and
switches of Figure 9 replaced by their effective
impedances. These impedances scale inversely with the
CLKIN frequency. For example, if f
CLKIN
is reduced by a
factor of two, the impedances will double. They also
change with the PGA setting. Table 10 lists the effective
impedances with the buffer off for f
CLKIN
= 7.68MHz.
Zeff
A
=
τ
SAMPLE
/C
A
Zeff
B
=
τ
SAMPLE
/C
B
Zeff
A
=
τ
SAMPLE
/C
A
AVDD/2
AVDD/2
Input
Multiplexer
AIN0
AIN1
AIN
P
AIN
N
AIN2
AIN3
AIN4
AIN5
AIN6
AIN7
AINCOM
ADS1256 Only
Figure 11. Analog Input Effective Impedances
with Buffer Off
Table 10. Analog Input Impedances with Buffer Off
PGA
SETTING
Zeff
A
(kΩ)
Zeff
B
(kΩ)
1 260 220
2 130 110
4 65 55
8 33 28
16 16 14
32 8 7
64 8 7
NOTE: f
CLKIN
= 7.68MHz.
VOLTAGE REFERENCE INPUTS (VREFP, VREFN)
The voltage reference for the ADS1255/6 A/D converter is
the differential voltage between VREFP and VREFN:
V
REF
= VREFP − VREFN. The reference inputs use a
structure similar to that of the analog inputs with the
circuitry on the reference inputs of Figure 12. The load
presented by the switched capacitor can be modeled with
an effective impedance (Zeff) of 18.5kΩ for
f
CLKIN
= 7.68MHz. The temperature coefficient of the
effective impedance of the voltage reference inputs is
approximately 35ppm/°C.
AVDD
Self Gain
Calibration
AIN
P
(1) f
CLKIN
=7.68MHz
AIN
N
Zeff = 18.5k
Ω
(1)
VREFP VREFN
AVDD
ESD
Protection
Figure 12. Simplified Reference Input Circuitry
ESD diodes protect the reference inputs. To keep these
diodes from turning on, make sure the voltages on the
reference pins do not go below AGND by more than
100mV, and likewise do not exceed AVDD by 100mV:
−100mV < (VREFP or VREFN) < AVDD + 100mV
During self gain calibration, all the switches in the input
multiplexer are opened, VREFN is internally connected to
AIN
N
, and VREFP is connected to AIN
P
. The input buffer
may be disabled or enabled during calibration. When the
buffer is disabled, the reference pins will be driving the
circuitry shown in Figure 9 during self gain calibration,
resulting in increased loading. To prevent this additional
loading from introducing gain errors, make sure the
circuitry driving the reference pins has adequate drive
capability. When the buffer is enabled, the loading on the
reference pins will be much less, but the buffer will limit the
allowable voltage range on VREFP and VREFN during
self or self gain calibration as the reference pins must
remain within the specified input range of the buffer in
order to establish proper gain calibration.
A high-quality reference voltage capable of driving the
switched capacitor load presented by the ADS1255/6 is
essential for achieving the best performance. Noise and
drift on the reference degrade overall system
performance. It is especially critical that special care be
given to the circuitry generating the reference voltages and
their layout when operating in the low-noise settings (that
is, with low data rates) to prevent the voltage reference
from limiting performance. See the Applications section for
more details.