Datasheet
ADS1254
12
SBAS213B
www.ti.com
SYMBOL DESCRIPTION MIN TYP MAX UNITS
t
OSC
CLK Period 125 ns
t
DRDY
Conversion Cycle 384 • t
OSC
ns
DRDY Mode DRDY Mode 36 • t
OSC
ns
DOUT Mode DOUT Mode 348 • t
OSC
ns
t
1
DOR Write Time 6 • t
OSC
ns
t
2
DOUT/DRDY LOW Time 6 • t
OSC
ns
t
3
DOUT/DRDY HIGH Time (Prior to Data Out) 6 • t
OSC
ns
t
4
DOUT/DRDY HIGH Time (Prior to Data Ready) 24 • t
OSC
ns
t
5
Rising Edge of CLK to Falling Edge of DOUT/DRDY 60 ns
t
6
End of DRDY Mode to Rising Edge of First SCLK 30 ns
t
7
End of DRDY Mode to Data Valid (Propagation Delay) 60 ns
t
8
Falling Edge of SCLK to Data Valid (Hold Time) 5 ns
t
9
Falling Edge of SCLK to Next Data Out Valid (Propagation Delay) 60 ns
t
10
SCLK Setup Time for Synchronization or Power Down 30 ns
t
11
DOUT/DRDY Pulse for Synchronization or Power Down 3 • t
OSC
ns
t
12
Rising Edge of SCLK Until Start of Synchronization 1537 • CLK 7679 • CLK ns
t
13
Synchronization Time 0.5 • CLK 6143.5 • CLK ns
t
14
Falling Edge of CLK (After SCLK Goes Low) Until Start of DRDY Mode 2042.5 • CLK ns
t
15
Rising Edge of SCLK Until Start of Power Down 7681 • CLK ns
t
16
Falling Edge of CLK (After SCLK Goes Low) Until Start of DRDY Mode 2318.5 • t
OSC
ns
t
17
Falling Edge of Last DOUT/DRDY to Start of Power Down 6144.5 • t
OSC
ns
t
18
DOUT/DRDY High Time After Mux Change. 2043.5 • tosc
NOTE: 30pF Load.
TABLE III. Digital Timing.
SERIAL INTERFACE
The ADS1254 includes a simple serial interface that can be
connected to microcontrollers and digital signal processors
in a variety of ways. Communications with the ADS1254
can commence on the first detection of the DOUT/DRDY
pulse after power up.
It is important to note that the data from the ADS1254 is a
24-bit result transmitted MSB-first in Offset Two’s Comple-
ment format, as shown in Table IV.
The data must be clocked out before the ADS1254 enters
DRDY mode to ensure reception of valid data, as described
in the DOUT/DRDY section of this data sheet.
ISOLATION
The serial interface of the ADS1254 provides for simple
isolation methods. The CLK signal can be local to the
ADS1254, which then only requires two signals (SCLK and
DOUT/DRDY) to be used for isolated data acquisition. The
channel select signals (CHSEL0, CHSEL1) will also need to
be isolated unless a counter is used to auto multiplex the
channels.
TABLE IV. ADS1254 Data Format (Offset Two's Comple-
ment).
DIFFERENTIAL VOLTAGE INPUT DIGITAL OUTPUT (HEX)
+Full Scale 7FFFFFH
Zero 000000H
–Full Scale 800000H
FIGURE 13. Multiplexer Operation.
DATA DATA
DOUT/DRDY
t
18
MUX CHANGE
CHSEL0, CHSEL1