Datasheet
ADS1253
SBAS199B
14
www.ti.com
ISOLATION
The serial interface of the ADS1253 provides for simple
isolation methods. The CLK signal can be local to the
ADS1253, which then only requires two signals (SCLK and
DOUT/DRDY
) to be used for isolated data acquisition. The
channel select signals (CHS0, CHS1) also need to be iso-
lated unless a counter is used to auto multiplex the channels.
LAYOUT
POWER SUPPLY
The power supply must be well regulated and low noise. For
designs requiring very high resolution from the ADS1253,
power-supply rejection will be a concern. Avoid running
digital lines under the device as they may couple noise onto
the die. High-frequency noise can capacitively couple into
the analog portion of the device and will alias back into the
passband of the digital filter, affecting the conversion result.
This clock noise will cause an offset error.
GROUNDING
The analog and digital sections of the system design should
be carefully and cleanly partitioned. Each section should
have its own ground plane with no overlap between them.
GND should be connected to the analog ground plane, as
well as all other analog grounds. Do not join the analog and
digital ground planes on the board, but instead connect the
two with a moderate signal trace. For multiple converters,
connect the two ground planes at one location as central to
all of the converters as possible. In some cases, experimen-
tation may be required to find the best point to connect the
two planes together. The printed circuit board can be de-
signed to provide different analog/digital ground connections
via short jumpers. The initial prototype can be used to
establish which connection works best.
DECOUPLING
Good decoupling practices should be used for the ADS1253
and for all components in the design. All decoupling capaci-
tors, and specifically the 0.1µF ceramic capacitors, should be
placed as close as possible to the pin being decoupled. A
1µF to 10µF capacitor, in parallel with a 0.1µF ceramic
capacitor, should be used to decouple V
DD
to GND.
SYSTEM CONSIDERATIONS
The recommendations for power supplies and grounding will
change depending on the requirements and specific design
of the overall system. Achieving 24 bits of noise performance
is a great deal more difficult than achieving 12 bits of noise
performance. In general, a system can be broken up into four
different stages:
• Analog Processing
• Analog Portion of the ADS1253
• Digital Portion of the ADS1253
• Digital Processing
For the simplest system consisting of minimal analog signal
processing (basic filtering and gain), a microcontroller, and
one clock source, one can achieve high resolution by power-
ing all components by a common power supply. In addition,
all components could share a common ground plane. Thus,
there would be no distinctions between analog power and
ground, and digital power and ground. The layout should still
include a power plane, a ground plane, and careful decou-
pling. In a more extreme case, the design could include:
• Multiple ADS1253s
• Extensive Analog Signal Processing
• One or More Microcontrollers, Digital Signal Processors,
or Microprocessors
• Many Different Clock Sources
• Interconnections to Various Other Systems
High resolution will be very difficult to achieve for this design.
The approach would be to break the system into as many
different parts as possible. For example, each ADS1253 may
have its own analog processing front end.
DEFINITION OF TERMS
An attempt has been made to be consistent with the termi-
nology used in this data sheet. In that regard, the definition
of each term is given as follows:
Analog-Input Differential Voltage—for an analog signal
that is fully differential, the voltage range can be compared to
that of an instrumentation amplifier. For example, if both
analog inputs of the ADS1253 are at 2.048V, the differential
voltage is 0V. If one analog input is at 0V and the other
analog input is at 4.096V, then the differential voltage mag-
nitude is 4.096V. This is the case regardless of which input