Datasheet

DVDD
DGND
CLK
RESET
REFP
REFN
AINP
AINN
SCLK
DIN
DOUT/DRDY
DRDY
CS
START
AVDD
AVSS
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
ADS1246
ADS1246
ADS1247
ADS1248
www.ti.com SBAS426G –AUGUST 2008–REVISED OCTOBER 2011
PW PACKAGE
TSSOP-16
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ADS1246 (TSSOP-16) PIN DESCRIPTIONS
NAME PIN NO. FUNCTION DESCRIPTION
DVDD 1 Digital Digital power supply
DGND 2 Digital Digital ground
CLK 3 Digital input External clock input. Tie this pin to DGND to activate the internal oscillator.
RESET 4 Digital input Chip reset (active low). Returns all register values to reset values.
REFP 5 Analog input Positive external reference input
REFN 6 Analog input Negative external reference input
AINP 7 Analog input Positive analog input
AINN 8 Analog input Negative analog input
AVSS 9 Analog Negative analog power supply
AVDD 10 Analog Positive analog power supply
START 11 Digital input Conversion start. See text for description of use.
CS 12 Digital input Chip select (active low)
DRDY 13 Digital output Data ready (active low)
Serial data out output, or
DOUT/DRDY 14 Digital output
Data out combined with Data Ready (active low when DRDY function enabled)
DIN 15 Digital input Serial data input
SCLK 16 Digital input Serial clock input
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