Datasheet

ADS1246
ADS1247
ADS1248
SBAS426G AUGUST 2008REVISED OCTOBER 2011
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ADS1247 and ADS1248 DETAILED REGISTER DEFINITIONS (continued)
GPIOCFGGPIO Configuration Register. The GPIO and analog pins are shared as follows:
GPIO0 shared with REFP0
GPIO1 shared with REFN0
GPIO2 shared with AIN2
GPIO3 shared with AIN3
GPIO4 shared with AIN4 (ADS1248)
GPIO5 shared with AIN5 (ADS1248)
GPIO6 shared with AIN6 (ADS1248)
GPIO7 shared with AIN7 (ADS1248)
GPIOCFG - ADDRESS 0Ch RESET VALUE = 00h
DEVICE BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
ADS1248 IOCFG7 IOCFG6 IOCFG5 IOCFG4 IOCFG3 IOCFG2 IOCFG1 IOCFG0
ADS1247 0 0 0 0 IOCFG3 IOCFG2 IOCFG1 IOCFG0
Bits 7:0 IOCFG7:0
These bits enable the GPIO because the GPIO pins are shared with the analog pins. Note that the
ADS1248 uses all the IOCFG bits, whereas the ADS1247 uses only bits 3:0.
0 = The pin is used as an analog input (default)
1 = The pin is used as a GPIO pin
GPIODIRGPIO Direction Register
GPIODIR - ADDRESS 0Dh RESET VALUE = 00h
DEVICE BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
ADS1248 IODIR7 IODIR6 IODIR5 IODIR4 IODIR3 IODIR2 IODIR1 IODIR0
ADS1247 0 0 0 0 IODIR3 IODIR2 IODIR1 IODIR0
Bits 7:0 IODIR7:0
These bits control the direction of the GPIO when enabled by the IOCFG bits. Note that the
ADS1248 uses all the IODIR bits, whereas the ADS1247 uses only bits 3:0.
0 = The GPIO is an output (default)
1 = The GPIO is an input
GPIODATGPIO Data Register
GPIODAT - ADDRESS 0Eh RESET VALUE = 00h
DEVICE BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
ADS1248 IODAT7 IODAT6 IODAT5 IODAT4 IODAT3 IODAT2 IODAT1 IODAT0
ADS1247 0 0 0 0 IODAT3 IODAT2 IODAT1 IODAT0
Bits 7:0 IODAT7:0
If a GPIO pin is enabled in the GPIOCFG register and configured as an output in the GPIO
Direction register (GPIODIR), the value written to this register appears on the appropriate GPIO
pin. If a GPIO pin is configured as an input in GPIODIR, reading this register returns the value of
the digital I/O pins. Note that the ADS1248 uses all eight IODAT bits, while the ADS1247 uses only
bits 3:0.
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