Datasheet

ADS1246
ADS1247
ADS1248
www.ti.com SBAS426G –AUGUST 2008–REVISED OCTOBER 2011
ADS1247 and ADS1248 DETAILED REGISTER DEFINITIONS (continued)
SYS0—System Control Register 0
SYS0 - ADDRESS 03h RESET VALUE = 00h
BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
0 PGA2 PGA1 PGA0 DOR3 DOR2 DOR1 DOR0
Bit 7 This bit must always be set to '0'
Bits 6:4 PGA2:0
These bits determine the gain of the PGA.
000 = 1 (default)
001 = 2
010 = 4
011 = 8
100 = 16
101 = 32
110 = 64
111 = 128
Bits 3:0 DOR3:0
These bits select the output data rate of the ADC. Bits with a value higher than 1001 select the
highest data rate of 2000SPS.
0000 = 5SPS (default)
0001 = 10SPS
0010 = 20SPS
0011 = 40SPS
0100 = 80SPS
0101 = 160SPS
0110 = 320SPS
0111 = 640SPS
1000 = 1000SPS
1001 to 1111 = 2000SPS
OFC23:0
These bits make up the offset calibration coefficient register of the ADS1248.
OFC0—Offset Calibration Coefficient Register 0
OFC0 - ADDRESS 04h RESET VALUE = 000000h
BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
OFC7 OFC6 OFC5 OFC4 OFC3 OFC2 OFC1 OFC0
OFC1—Offset Calibration Coefficient Register 1
OFC1 - ADDRESS 05h RESET VALUE = 000000h
BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
OFC15 OFC14 OFC13 OFC12 OFC11 OFC10 OFC9 OFC8
OFC2—Offset Calibration Coefficient Register 2
OFC2 - ADDRESS 06h RESET VALUE = 000000h
BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
OFC23 OFC22 OFC21 OFC20 OFC19 OFC18 OFC17 OFC16
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