Datasheet

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SBAS287AJUNE 2003 − REVISED SEPTEMBER 2003
www.ti.com
3
ELECTRICAL CHARACTERISTICS
All specifications at T
A
= −40°C to +85°C, AVDD = +5V, DVDD = +3V, f
CLK
= 2.4576MHz, and V
REF
= +1.25V, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Analog Input
Full-scale input voltage range AINP − AINN ±2V
REF
V
Absolute input range AINP, AINN with respect to GND GND + 0.1 AVDD − 1.25 V
Differential input impedance f
CLK
= 2.4576MHz 3 G
System Performance
Resolution No missing codes 24 Bits
Data rate f
CLK
= 2.4576MHz 15 SPS
(1)
Integral nonlinearity (INL) Differential input signal, end point fit ±0.0006 ±0.0015 %FSR
(2)
Offset error 1 14 ppm of FSR
Offset error drift
(3)
0.01 ppm of FSR/°C
Gain error
(4)
0.005 0.1 %
Gain error drift
(3)
0.5 ppm/°C
At DC 90 100 dB
Common-mode rejection
f
CM
(5)
= 50 ± 1Hz, f
CLK
= 2.4576MHz 100 dB
Common-mode rejection
f
CM
= 60 ± 1Hz, f
CLK
= 2.4576MHz 100 dB
Normal-mode rejection
f
SIG
(6)
= 50 ± 1Hz, f
CLK
= 2.4576MHz 60 dB
Normal-mode rejection
f
SIG
= 60 ± 1Hz, f
CLK
= 2.4576MHz 70 dB
Input referred noise 2
ppm of FSR,
RMS
Analog power-supply rejection At DC, AVDD = 5% 100 dB
Digital power-supply rejection At DC, AVDD = 5% 100 dB
Voltage Reference Input
Reference input voltage (V
REF
) V
REF
VREFP − VREFN 0.5 1.25 AVDD
(7)
V
Negative reference input (VREFN) GND − 0.1 VREFP − 0.5 V
Positive reference input (VREFP) VREFN + 0.5 AVDD + 0.1 V
Voltage reference impedance f
CLK
= 2.4576MHz 1 M
Digital Input/Output
V
IH
(CLK, SCLK) 0.8 DVDD 5.25 V
Logic levels
V
IL
(CLK, SCLK) GND 0.2 DVDD V
Logic levels
V
OH
(DRDY, DOUT) I
OH
= 1mA DVDD − 0.4 DVDD V
V
OL
(DRDY, DOUT) I
OL
= 1mA GND DVDD + 0.4 V
Input leakage (CLK, SCLK) 0 < (CLK, SCLK) < DVDD ±10 µA
CLK frequency (f
CLK
) 6 MHz
CLK duty cycle 30 70 %
Power Supply
AVDD 2.7 5.25 V
DVDD 1.8 3.6 V
Sleep mode 0.1 1 µA
AVDD current
AVDD = 3V 152 µA
AVDD current
AVDD = 5V 158 250 µA
Sleep mode, CLK stopped 0.1 µA
DVDD current
Sleep mode, 2.4576MHZ CLK running 1.6 5 µA
DVDD current
DVDD = 3V 5 10 µA
Total power dissipation AVDD = DVDD = 3V 0.47 mW
(1)
SPS = samples per second.
(2)
FSR = full-scale range = 4V
REF
.
(3)
Recalibration can reduce these errors to the level of the noise.
(4)
Achieving specified gain error performance requires that calibration be performed with reference voltage input between (GND + 0.1V) and
(AVDD − 1.25V). See Voltage Reference Inputs section.
(5)
f
CM
is the frequency of the common-mode input.
(6)
f
SIG
is the frequency of the input signal.
(7)
It will not be possible to reach the digital output full-scale code when V
IN
> 2V
REF
.