Datasheet

"#$%&
SBAS287A − JUNE 2003 − REVISED SEPTEMBER 2003
www.ti.com
14
SINGLE CONVERSIONS
When only single conversions are needed, Sleep mode
can be used to start and stop the ADS1245. To make a
single conversion, first enter the Sleep Mode holding
SCLK high. Now, when ready to start the conversion, take
SCLK low. The ADS1245 will wake up and begin the
conversion. Wait for DRDY
/DOUT to go low, and then
retrieve the data. Afterwards, take SCLK high to stop the
ADS1245 from converting and re−enter Sleep mode.
Continue to hold SCLK high until ready to start the next
conversion. Operating in this fashion greatly reduces
power consumption since the ADS1245 is shut down while
idle between conversions. Self−calibrations can be
performed prior to the start of the single conversions by
using the waveform shown in Figure 28.
SINGLE-SUPPLY OPERATION
It is possible to operate the ADS1245 with a single supply.
For a 3V supply, simply connect AVDD and DVDD
together. Figure 29 shows an example of the ADS1245
running on a single 5V supply. An external resistor, R
1
, is
used to drop 5V supply down to a desired voltage level of
DVDD. For example, if the desired DVDD supply voltage
is 3V and AVDD is 5V, the value of R
1
should be:
R
1
+ (5V * 3V)
ń
5mA [ 400kW
where 5mA is a typical digital current consumption when
DVDD = 3V (refer to the typical characteristic Digital
Current vs Digital Supply). A buffer on DRDY/DOUT can
provide level−shifting if required.
DVDD can be set to a desired voltage by choosing a proper
value of R
1
, but keep in mind that DVDD must be set
between 1.8V and 3.6V. Note that the maximum logic high
output of DRDY
/DOUT is equal to DVDD, but both CLK
and SCLK inputs can be driven with 5V logic regardless of
the DVDD or AVDD voltage. Use 0.1mF capacitors to
bypass both AVDD and DVDD.
109876
12345
CLK SCLK DRDY/DOUT DVDD AVDD
GND VREFP VREFN AINN AINP
ADS1245
R
1
0.1
µ
F
+5V
to +5V logic
from
+5V logic
from
+5V logic
0.1
µ
F
++
SN74LVCC3245A
Figure 29. Example of the ADS1244 Running on a
Single 5V Supply
MULTI-CHANNEL SYSTEMS
Multiple ADS1245s can be operated in parallel to measure
multiple input signals. Figure 30 shows an example of a
two-channel system. For simplicity, the supplies and
reference circuitry were not included. The same CLK
signal should be applied to all devices. To be able to
synchronize the ADS1245s, connect the same SCLK
signal to all devices as well. When ready to synchronize,
place all the devices in Sleep mode. Afterwards, a wakeup
command will synchronize all the ADS1245s; that is, they
will sample the input signals simultaneously
The DRDY
/DOUT outputs will go low at approximately the
same time after synchronization. The falling edges,
indicating that new data is ready, will vary with respect to
each other no more than timing specification t
14. This
variation is due to possible differences in the ADS1245
internal calibration settings. To account for this when using
multiple devices, either wait for t
14 to pass after seeing one
device DRDY
/DOUT go low, or wait until all DRDY/DOUTs
have gone low before retrieving data.
(1)