Datasheet
www.ti.com
ADS1232
ADS1234
SBAS350F – JUNE 2005 – REVISED FEBRUARY 2008
PIN DESCRIPTIONS
TERMINAL
ANALOG/DIGITAL
NAME ADS1232 ADS1234 INPUT/OUTPUT DESCRIPTION
DVDD 1 1 Digital Digital Power Supply: 2.7V to 5.3V
DGND 2 2 Digital Digital Ground
CLKIN/ External Clock Input: typically 4.9152MHz. Tie low to activate internal oscillator. Can also use
3 3 Digital/Digital Input
XTAL1 external crystal across CLKIN/XTAL1 and XTAL2 pins. See text for more details.
XTAL2 4 4 Digital External crystal connection
DGND 5 5 Digital Digital Ground
DGND 6 6 Digital Digital Ground
TEMP 7 – Digital Input Onboard Temperature Diode Enable
Input Mux Select Input pin (MSB)
Input Mux Select Input pin (LSB):
A1 A0 Channel
A1 – 7
Digital Input 0 0 AIN1
A0 8 8
0 1 AIN2
1 0 AIN3
1 1 AIN4
CAP 9 9 Analog Gain Amp Bypass Capacitor Connection
CAP 10 10 Analog Gain Amp Bypass Capacitor Connection
AINP1 11 11 Analog Input Positive Analog Input Channel 1
AINN1 12 12 Analog Input Negative Analog Input Channel 1
AINP3 – 13 Analog Input Positive Analog Input Channel 3
AINN3 – 14 Analog Input Negative Analog Input Channel 3
AINN4 – 15 Analog Input Negative Analog Input Channel 4
AINP4 – 16 Analog Input Positive Analog Input Channel 4
AINN2 13 17 Analog Input Negative Analog Input Channel 2
AINP2 14 18 Analog Input Positive Analog Input Channel 2
REFN 15 19 Analog Input Negative Reference Input
REFP 16 20 Analog Input Positive Reference Input
AGND 17 21 Analog Analog Ground
AVDD 18 22 Analog Analog Power Supply, 2.7V to 5.3V
Gain Select
GAIN1 GAIN0 GAIN
0 0 1
GAIN0 19 23
Digital Input
GAIN1 20 24
0 1 2
1 0 64
1 1 128
Data Rate Select:
SPEED DATA RATE
SPEED 21 25 Digital Input
0 10SPS
1 80SPS
PDWN 22 26 Digital Input Power-Down: Holding this pin low powers down the entire converter and resets the ADC.
Serial Clock: Clock out data on the rising edge. Also used to initiate Offset Calibration and Sleep
SCLK 23 27 Digital Input
modes. See text for more details.
Dual-Purpose Output:
DRDY/
24 28 Digital Output Data Ready: Indicates valid data by going low.
DOUT
Data Output: Outputs data, MSB first, on the first rising edge of SCLK.
Copyright © 2005 – 2008, Texas Instruments Incorporated 7
Product Folder Link(s): ADS1232 ADS1234