Datasheet

DVDD
GND
CLKIN
SPEED
CAP
CAP
AINP
AINN
DRDY/DOUT
SCLK
PDWN
AVDD
SW
GND
VREFP
VREFN
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
ADS1231
www.ti.com SBAS414D –JULY 2009–REVISED OCTOBER 2013
PIN CONFIGURATION
D PACKAGE
SO-16
(TOP VIEW)
PIN DESCRIPTIONS
ANALOG/DIGITAL
NAME TERMINAL INPUT/OUTPUT DESCRIPTION
DVDD 1 Digital Digital power supply
GND 2 Supply Ground for digital and analog supplies
CLKIN 3 Digital input External clock input: typically 4.9152MHz. Tie low to activate internal oscillator.
Data rate select:
SPEED DATA RATE
SPEED 4 Digital input
0 10SPS
1 80SPS
CAP 5 Analog Gain amplifier bypass capacitor connection
CAP 6 Analog Gain amplifier bypass capacitor connection
AINP 7 Analog input Positive analog input
AINN 8 Analog input Negative analog input
VREFN 9 Analog input Negative reference input
VREFP 10 Analog input Positive reference input
GND 11 Supply Ground for digital and analog supplies
SW 12 Analog Low-side power switch
AVDD 13 Supply Analog power supply
PDWN 14 Digital input Power-down: holding this pin low powers down the entire converter and resets the ADC.
Serial clock: clock out data on the rising edge. Also used to initiate Standby mode. See the Standby
SCLK 15 Digital input
Mode section for more details.
Dual-purpose output:
DRDY/DOUT 16 Digital output Data ready: indicates valid data by going low.
Data output: outputs data, MSB first, on the first rising edge of SCLK.
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