Datasheet

R
INT
R
INT
R
F1
R
1
R
F2
ADC
A3
Gain=1or2
CAP
AINP
CAP
A2
A1
450W
18pF
AINN
450W
18pF
ADS1230
SBAS366B –OCTOBER 2006–REVISED SEPTEMBER 2012 www.ti.com
OVERVIEW input ranges from 0mV to +39mV (Gain = 64) or 0mV
to +19.5mV (Gain = 128). The inputs of the ADS1230
The ADS1230 is a precision, 20-bit ADC that includes
are protected with internal diodes connected to the
a low-noise PGA, internal oscillator, third-order delta-
power-supply rails. These diodes clamp the applied
sigma (ΔΣ) modulator, and fourth-order digital filter.
signal to prevent it from damaging the input circuitry.
The ADS1230 provides a complete front-end solution
for bridge sensor applications such as weigh scales,
strain guages, and pressure sensors.
Clocking can be supplied by an external clock or by a
precision internal oscillator. Data can be output at
10SPS for excellent 50Hz and 60Hz rejection, or at
80SPS when higher speeds are needed. The
ADS1230 is easy to configure, and all digital control
is accomplished through dedicated pins; there are no
registers to program. A simple two-wire serial
interface retrieves the data.
ANALOG INPUTS (AINP, AINN)
The input signal to be measured is applied to the
input pins AINP and AINN. The ADS1230 accepts
differential input signals, but can also measure
unipolar signals. When measuring unipolar (or single-
ended signals) with respect to ground, connect the
Figure 18. Simplified Diagram of the PGA
negative input (AINN) to ground and connect the
input signal to the positive input (AINP). Note that
when the ADS1230 is configured this way, only half
Bypass Capacitor
of the converter full-scale range is used, since only
positive digital output codes are produced.
By applying a 0.1μF external capacitor (C
EXT
) across
two capacitor pins combined with the internal 2kΩ
resistor R
INT
(on-chip), a low-pass filter with a corner
LOW-NOISE PGA
frequency of 720Hz is created to bandlimit the signal
The ADS1230 features a low-drift, low-noise PGA
path before the modulator input. This low-pass filter
that provides a complete front-end solution for bridge
serves two purposes. First, the input signal is
sensors. A simplified diagram of the PGA is shown in
bandlimited to prevent aliasing as well as to filter out
Figure 18. It consists of two chopper-stabilized
the high-frequency noise. Second, it attenuates the
amplifiers (A1 and A2) and three accurately-matched
chopping residue from the amplifier to improve
resistors (R
1
, R
F1
, and R
F2
), which construct a
temperature drift performance. It is not required to
differential front-end stage with a gain of 64, followed
use high-quality capacitors (such as ceramic or
by gain stage A3 (Gain = 1 or 2). The PGA inputs are
tantalum capacitors) for a general application.
equipped with an EMI filter, as shown in Figure 18.
However, high-quality capacitors such as poly are
The cutoff frequency of the EMI filter is 19.6MHz. By
recommended for high-linearity applications.
using AVDD as the reference input, the bipolar input
ranges from –39mV to +39mV (Gain = 64) or
–19.5mV to +19.5mV (Gain = 128), and the unipolar
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