Datasheet
Analog Input Measurement Without the Input
Zeff =t /C
A SAMPLE A1
=4MW
Zeff =t /C
B SAMPLE B
=2MW
Zeff =t /C
A SAMPLE A2
=4MW
AINPx
AINNx
AVDD/2
AVDD/2
GND * 100mV t
(
AINP, AINN
)
t VDD ) 100mV
Analog Input Measurement with the Input Buffer
MUX
AVDD
AVDD/2
AVDD/2
S
1
S1
AINN
AINP
S
2
C
A1
3pF
C
B
6pF
C
A2
3pF
AVDD
ESDProtection
AINPx
AINNx
S2
AINP
AINN
1GW
ON
OFF
ON
S
1
S
2
OFF
t =12 sm
SAMPLE
ADS1225
ADS1226
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....................................................................................................................................................... SBAS346C – MAY 2006 – REVISED JANUARY 2009
Buffer
With the buffer disabled by setting the BUFEN pin
low, the ADS1225 and ADS1226 measure the input
signal using internal capacitors that are continuously
charged and discharged. Figure 20 shows a
simplified schematic of the ADS1225/6 input circuitry,
with Figure 21 showing the on/off timings of the
switches. The S
1
switches close during the input
sampling phase. With S
1
closed, C
A1
charges to
AINP, C
A2
charges to AINN, and C
B
charges to (AINP
– AINN). For the discharge phase, S
1
opens first and
then S
2
closes. C
A1
and C
A2
discharge to
Figure 22. Effective Analog Input Impedances
approximately VDD/2 and C
B
discharges to 0V. The with the Buffer Off
constant charging of the input capacitors presents a
load on the inputs that can be represented by
ESD diodes protect the inputs. To keep these diodes
effective impedances. Figure 22 shows the input
from turning on, make sure the voltages on the input
circuitry with the capacitors and switches of Figure 20
pins do not go below GND by more than 100mV, and
by their effective impedances.
likewise do not exceed VDD by 100mV. This
limitation is shown in Equation 1 :
(1)
When the buffer is enabled by setting the BUFEN pin
high, a low-drift, chopper-stabilized input buffer is
used to achieve very high input impedance. The
buffer charges the input sampling capacitors, thus
removing the load from the measurement. Because
the input buffer is chopper-stabilized, the charging of
parasitic capacitances causes the charge to be
carried away, as if by resistance. The input
impedance can be modeled by a single resistor, as
Figure 20. Simplified Input Structure with the
shown in Figure 23 . Note that when START is low,
Buffer Turned Off
the buffer must be disabled to prevent loading of the
inputs.
Figure 23. Effective Analog Input Impedances
with the Buffer On
Figure 21. S
1
and S
2
Switch Timing for Figure 20
Note also that the analog inputs (listed in the
Electrical Characteristics table as Absolute Input
Range) must remain between GND + 0.05V to AVDD
– 1.5V. Exceeding this range degrades linearity and
results in performance outside the specified limits.
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