Datasheet

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SBAS286C − JUNE 2003 − REVISED JANUARY 2009
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9
Analog Input Measurement without the Input Buffer
With the buffer disabled by setting the BUFEN pin low, the
ADS1224 measures the input signal using internal
capacitors that are continuously charged and discharged.
Figure 14 shows a simplified schematic of the ADS1224
input circuitry, with Figure 15 showing the on/off timings of
the switches. The S
1
switches close during the input
sampling phase. With S1 closed, C
A1
charges to AINP,
C
A2
charges to AINN, and C
B
charges to (AINP – AINN).
For the discharge phase, S
1
opens first and then S
2
closes. C
A1
and C
A2
discharge to approximately AVDD/2
and C
B
discharges to 0V. This two-phase
sample/discharge cycle repeats with a frequency of
f
CLK
/32 (62.5kHz for f
CLK
= 2MHz).
Mux
AVDD
AVDD/2
AVDD/2
S
1
S
1
AINN
AINP
S
2
C
A1
3pF
C
B
6pF
C
A2
3pF
AVDD
ESD Protection
AINPx
AINNx
S
2
Figure 14. Simplified Input Structure with the
Buffer Turned Off
ON
OFF
ON
S
1
S
2
OFF
t
SAMPLE
= 32/f
CLK
Figure 15. S
1
and S
2
Switch Timing for Figure 14
The constant charging of the input capacitors presents
a load on the inputs that can be represented by effective
impedances. Figure 16 shows the input circuitry with
the capacitors and switches of Figure 14 replaced by
their effective impedances. These impedances scale
inversely with f
CLK
frequency. For example, if f
CLK
frequency is reduced by a factor of 2, the impedances
will double.
Zeff
A
=t
SAMPLE
/C
A1
=6M
Ω
(1)
Zeff
B
=t
SAMPLE
/C
B
=3M
Ω
(1)
Zeff
A
=t
SAMPLE
/C
A2
=6M
Ω
(1)
NOTE: (1) f
CLK
=2MHz.
AINPx
AINNx
AVDD/2
AVDD/2
Figure 16. Effective Analog Input Impedances
with the Buffer Off
ESD diodes protect the inputs. To keep these diodes
from turning on, make sure the voltages on the input
pins do not go below GND by more than 100mV, and
likewise do not exceed AVDD by 100mV:
GND – 100mV < (AINP, AINN) < AVDD + 100mV
Analog Input Measurement with the Input Buffer
When the buffer is enabled by setting the BUFEN pin
high, a low-drift, chopper-stabilized input buffer is used
to achieve very high input impedance. The buffer
charges the input sampling capacitors, thus removing
the load from the measurement. Because the input
buffer is chopper-stabilized, the charging of parasitic
capacitances causes the charge to be carried away, as
if by resistance. The input impedance can be modeled
by a single resistor, as shown in Figure 17. The
impedance scales inversely with f
CLK
frequency, as in
the nonbuffered case. Note that during standby mode,
the buffer must be disabled to prevent loading of the
inputs.
AINP
AINN
1.2G
Ω
(1)
NOTE: (1) f
CLK
=2MHz.
Figure 17. Effective Analog Input Impedances
with the Buffer On
Note also that the analog inputs (listed in the Electrical
Characteristics table as Absolute Input Range) must
remain between GND + 0.05V to AVDD − 1.5V.
Exceeding this range degrades linearity and results in
performance outside the specified limits.