Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsData collecting ICsData acquisition IC - AD converter (ADC) External TSSOP 14

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SBAS314B − APRIL 2004 − REVISED JANUARY 2009

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MULTICHANNEL SYSTEMS

Multiple ADS1222s can be operated in parallel to

measure multiple input signals. Figure 31 shows an

example of a four-channel system. For simplicity, the

supplies and reference circuitry are not shown. The

same CLK signal should be applied to all devices. To

synchronize the ADS1222s, connect the same SCLK

signal to all devices. Then place all the devices in

Standby mode. Afterwards, starting a conversion will

synchronize all the ADS1222s; that is, they will sample

the input signals simultaneously. The DRDY/DOUT

outputs will go low at approximately the same time after

synchronization. When reading data from the devices,

the data appears in parallel on DRDY/DOUT as a result

of the common SCLK connection.

The falling edges of DRDY

/DOUT, indicating that new

data is ready, will vary with respect to each other no

more than time t

. This variation is due to possible

differences in the ADS1222 internal calibration settings.

To account for this, when using multiple devices, either

wait for t

to pass after seeing one DRDY/DOUT go

low, or wait until all DRDY/DOUTs have gone low before

retrieving data.

Note that changing channels (using the MUX pin), or

using the input buffer (BUFEN) or the temperature

sensor (TEMPEN), may require more care to settle the

digital filter. For example, if the MUX pin is toggled on

one device and not the other, the DRDY/DOUT line will

be held high until the conversion settles on the first

device. The latter device will continue conversions

through this time. See the Settling Time section of this

datasheet for further details.

SYMBOL DESCRIPTION MIN MAX UNITS

(1)

Difference between DRDY/DOUTs going low in multichannel ±0.8 ms

systems

(1)

Values given for f

CLK

= 2MHz. For different f

CLK

frequencies, scale proportional to CLK period.

CLK

SCLK

DRDY/DOUT

AINP1

AINN1

AINP4

AINN4

MUX

ADS1222

MUX Select

Inputs

OUT1

CLK and SCLK

Sources