Datasheet

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SBAS314B − APRIL 2004 − REVISED JANUARY 2009
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15
SELF-CALIBRATION
Self-calibration can be initiated at any time, although in
many applications the ADS1222 drift performance is so
good that the self-calibration performed automatically
at power-up is all that is needed. To initiate
self-calibration, apply at least two additional SCLKs
after retrieving 24 bits of data. Figure 27 shows the
timing pattern. The 25th SCLK will send DRDY/DOUT
high. The falling edge of the 26th SCLK will begin the
calibration cycle. Additional SCLK pulses may be sent
after the 26th SCLK; however, activity on SCLK should
be minimized during calibration for best results.
When the calibration is complete, DRDY/DOUT goes
low, indicating that new data is ready. There is no need
to alter the analog input signal applied to the ADS1222
during calibration; the input pins are disconnected
within the A/D converter and the appropriate signals are
applied internally and automatically. The first
conversion after a calibration is fully settled and valid for
use. The time required for a calibration depends on two
independent signals: the falling edge of SCLK and an
internal clock derived from CLK. Variations in the
internal calibration values will change the time required
for calibration (t
8
) within the range given by the min/max
specs. t
11
and t
12
described in the next section are
affected likewise.
STANDBY MODE
Standby mode dramatically reduces power
consumption (typically < 1µW with CLK stopped) by
shutting down all of the active circuitry. To enter Standby
mode, simply hold SCLK high after DRDY/DOUT goes
low, as shown in Figure 28. Standby mode can be
initiated at any time during readback; it is not necessary
to retrieve all 24 bits of data beforehand. Note that
during standby mode, the buffer must be disabled to
prevent loading of the inputs.
When t
11
has passed with SCLK held high, Standby mode
will activate. DRDY/DOUT stays high when Standby
mode begins. SCLK must remain high to stay in Standby
mode. To exit Standby mode (wakeup), set SCLK low.
The first data after exiting Standby mode is valid. It is not
necessary to stop CLK during Standby mode, but doing
so will further reduce the digital supply current.
Standby Mode With Self-Calibration
Self-calibration can be set to run immediately after
exiting Standby mode. This is useful when the
ADS1222 is put in Standby mode for long periods of
time and self-calibration is desired afterwards to
compensate for temperature or supply voltage
changes.
To force a self-calibration with Standby mode, shift 25
bits out before taking SCLK high to enter Standby
mode. Self-calibration then begins after wakeup.
Figure 29 shows the appropriate timing. Note the extra
time needed after wakeup for calibration before data is
ready. The first data after Standby mode with
self-calibration is fully settled and can be used.
23DRDY/DOUT
SCLK 1 24
t
8
25 26
2322 21 0
Data Ready After Calibration
Calibration Begins
SYMBOL DESCRIPTION MIN MAX UNITS
t
8
(1)
First data ready after calibration 77.1 77.9 ms
(1)
Values given for f
CLK
= 2MHz. For different f
CLK
frequencies, scale proportional to CLK period.
Figure 27. Self-Calibration Timing