Datasheet

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Quick Reference

3 Quick Reference

Table 3 provides a quick summary of the key connections necessary for EVM operation. This information

is helpful when using an external processor, or for monitoring EVM operation.

Table 3. Critical Connections

Function Header (Pin) Pin Name Description

CS JAC.3 (TP1) CS Chip select

SCLK JDB.16 (TP2) SCLK Serial clock

SPI DIN JAC.15 (TP3) DIN Data in

DOUT/DRDY JDB.18 (TP5) DOUT Data out

DRDY JAC.11 (TP4) DRDY Data ready

+3.3 V JAC.1 (TP9) +3.3V Digital or analog supply

Power

+5 V JAC.2, J7 (TP8) +5V Analog supply

J1.4, J2.2, J4.2,

Channel 1 AIN0/REFP1 Analog or reference input

J6.4

J1.3, J2.3, J3.2,

Channel 2 AIN1 Analog input

J4.4, J6.3

J1.2, J2.1, J3.1,

Analog inputs

Channel 3 AIN2 Analog input

J4.6, J6.2

Channel 4 J1.1, J4.8, J6.1 AIN3/REFN1 Analog or reference input

J2.4, J4.10 REFP0 Reference input (+)

External reference

J4.9 REFN0 Reference input (–)

3.1 Analog Inputs

The analog inputs for the ADS1220EVM are connected to J1, J2, J3, J4, and J6. Channels 1 to 4 and the

external reference, connect to header J4.

3.2 Digital Control

The digital control signals can be applied directly to connectors JAC and JDB. The connector footprints

are on the bottom side of the board and the connectors are not installed.

3.3 Power Supply

The ADS1220EVM requires power rails as follows:

• +5-V analog supply: supplied by USB or from an external source connected to J7.

• +3.3-V digital or analog supply: can be supplied from the +5-V supply.

3.4 Voltage Reference

The ADS1220EVM has three options for the reference voltage: an internal reference and two possible

external reference inputs (REF0 and REF1). The ADS1220 internal reference is selected at power up.

Two external reference connections are available as follows:

• REF0 dedicated reference input connected to J2.4 and J4.9-10, and

• REF1 shared with analog inputs connected to J1.1, J1.4, J2.2, J4.2, J4.8, J6.1, and J6.4.

SBAU203–July 2013 ADS1x20EVM

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