Datasheet
Table Of Contents
- FEATURES
- APPLICATIONS
- DESCRIPTION
- ABSOLUTE MAXIMUM RATINGS
- ELECTRICAL CHARACTERISTICS: AVDD = 5V
- ELECTRICAL CHARACTERISTICS: AVDD = 3V
- DIGITAL CHARACTERISTICS: TMIN to TMAX, DVDD = 2.7V to 5.25V
- FLASH CHARACTERISTICS: TMIN to TMAX, DVDD = 2.7V to 5.25V, unless otherwise specified.
- PIN CONFIGURATION
- TIMING SPECIFICATIONS
- TIMING SPECIFICATION TABLE
- TIMING SPECIFICATION TABLE
- TYPICAL CHARACTERISTICS
- OVERVIEW
- INPUT MULTIPLEXER
- TEMPERATURE SENSOR
- BURNOUT CURRENT SOURCES
- INPUT BUFFER
- IDAC1 AND IDAC2
- PGA
- PGA OFFSET DAC
- MODULATOR
- VOLTAGE REFERENCE INPUT
- ON-CHIP VOLTAGE REFERENCE
- VRCAP PIN
- CLOCK GENERATOR
- CALIBRATION
- DIGITAL FILTER
- DIGITAL I/O INTERFACE
- SERIAL PERIPHERAL INTERFACE
- DATA READY
- DSYNC OPERATION
- MEMORY
- REGISTER BANK
- RAM
- FLASH
- REGISTER MAP
- COMMAND DEFINITIONS
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D
IN
1101 1111
• • •
(1)
xxxx xxxx
D
OUT
Checksum
D
IN
0100 1000
0101 0110 xxxx 0001 Data for DIO Data for DIRD
IN
ADS1218
SBAS187C – SEPTEMBER 2001 – REVISED SEPTEMBER 2005
CREG Copy Registers to RAM Bank
Description: Copy the 16 control registers to the RAM bank specified in the op code. Refer to timing
specifications for command execution time.
Operands: a
Bytes: 1
Encoding: 0100 0aaa
Data Transfer Sequence:
Copy Register Values to RAM Bank 3
NOTE: (1) For wait time, refer to timing specification.
CREGA Copy Registers to All RAM Banks
Description: Duplicate the 16 control registers to all the RAM banks. Refer to timing specifications for command
execution time.
Operands: None
Bytes: 1
Encoding: 0100 1000
Data Transfer Sequence:
WREG Write to Register
Description: Write to the registers starting with the register specified as part of the instruction. The number of
registers that will be written is one plus the value of the second byte.
Operands: r, n
Bytes: 2
Encoding: 0101 rrrr xxxx nnnn
Data Transfer Sequence:
Write Two Registers Starting from 06
H
(DIO)
30