Datasheet

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COMMAND DEFINITIONS
ADS1218
SBAS187C – SEPTEMBER 2001 – REVISED SEPTEMBER 2005
The commands listed below control the operation of Operands: n = count (0 to 127)
the ADS1218. Some of the commands are
r = register (0 to 15)
stand-alone commands (e.g., RESET) while others
require additional bytes (e.g., WREG requires
x = don’t care
command, count, and the data bytes). Commands
a = RAM bank address (0 to 7)
that output data require a minimum of four f
OSC
cycles
before the data is ready (e.g., RDATA).
f = Flash memory page address (0 to 31)
Table 3. Command Summary
COMMANDS DESCRIPTION COMMAND BYTE
(1)
2ND COMMAND BYTE
RDATA Read Data 0000 0001 (01
H
) —
RDATAC Read Data Continuously 0000 0011 (03
H
) —
STOPC Stop Read Data Continuously 0000 1111 (0F
H
) —
RREG Read from REG Bank rrrr 0001 r r r r (1x
H
) xxxx_nnnn (# of reg–1)
RRAM Read from RAM Bank aaa 0010 0aaa (2x
H
) xnnn_nnnn (# of bytes–1)
CREG Copy REGs to RAM Bank aaa 0100 0aaa (4x
H
) —
CREGA Copy REGS to all RAM Banks 0100 1000 (48
H
) —
WREG Write to REG rrrr 0101 r r r r (5x
H
) xxxx_nnnn (# of reg–1)
WRAM Write to RAM Bank aaa 0110 0aaa (6x
H
) xnnn_nnnn (# of bytes–1)
RF2R Read Flash page to RAM 100f f f f f (8, 9x
H
) —
WR2F Write RAM to Flash page 101f f f f f (A, Bx
H
) —
CRAM Copy RAM Bank aaa to REG 1100 0aaa (Cx
H
) —
CSRAMX Calc RAM Bank aaa Checksum 1101 0aaa (Dx
H
) —
CSARAMX Calc all RAM Bank Checksum 1101 1000 (D8
H
) —
CSREG Calc REG Checksum 1101 1111 (DF
H
) —
CSRAM Calc RAM Bank aaa Checksum 1110 0aaa (Ex
H
) —
CSARAM Calc all RAM Banks Checksum 1110 1000 (E8
H
) —
CSFL Calc Flash Checksum 1110 1100 (EC
H
) —
SELFCAL Self Cal Offset and Gain 1111 0000 (F0
H
) —
SELFOCAL Self Cal Offset 1111 0001 (F1
H
) —
SELFGCAL Self Cal Gain 1111 0010 (F2
H
) —
SYSOCAL Sys Cal Offset 1111 0011 (F3
H
) —
SYSGCAL Sys Cal Gain 1111 0100 (F4
H
) —
DSYNC Sync DRDY 1111 1100 (FC
H
) —
SLEEP Put in SLEEP Mode 1111 1101 (FD
H
) —
RESET Reset to Power-Up Values 1111 1110 (FE
H
) —
(1) The data input received by the ADS1218 is always MSB first. The data out format is set by the BIT ORDER bit in ACR reg.
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