Datasheet

ADS1217
4
SBAS260C
www.ti.com
ELECTRICAL CHARACTERISTICS: AV
DD
= 3V
All specifications at –40°C to +85°C, AV
DD
= +3V, DV
DD
= +2.7V to 5.25V, f
MOD
= 19.2kHz, PGA = 1, Buffer ON, R
DAC
= 75kΩ, f
DATA
= 10Hz, and V
REF
= +1.25V,
unless otherwise specified.
ADS1217
PARAMETER CONDITIONS MIN TYP MAX UNITS
ANALOG INPUT
(A
IN
0 – A
IN
7, A
INCOM
)
Full-Scale Input Voltage (A
IN+
) – (A
IN–
) ±2V
REF
/PGA V
Analog Input Range Buffer OFF AGND – 0.1 AV
DD
+ 0.1 V
Buffer ON AGND + 0.05 AV
DD
– 1.5 V
Input Impedance Buffer OFF 10/PGA MΩ
Input Current Buffer ON 0.5 nA
Bandwidth
Fast Settling Filter –3dB 0.469f
DATA
Hz
Sinc
2
Filter –3dB 0.318f
DATA
Hz
Sinc
3
Filter –3dB 0.262f
DATA
Hz
Programmable Gain Amplifier User Selectable Gain Ranges 1 128
Burnout Current Sources 2 µA
OFFSET DAC
Offset DAC Range ±V
REF
/(PGA) V
Offset DAC Monotonicity 8 Bits
Offset DAC Gain Error ±1%
Offset DAC Gain Error Drift 2 ppm/°C
SYSTEM PERFORMANCE
Resolution 24 Bits
No Missing Codes Sinc
3
Filter 24 Bits
Integral Nonlinearity End Point Fit, Differential Input, 0.0003 0.0012 % of FSR
(1)
Buffer Off, T = 25°C
Offset Error Before Calibration 15 ppm of FSR
Offset Drift 0.04 ppm of FSR/°C
Gain Error After Calibration 0.010 %
Gain Error Drift 1.0 ppm/°C
Common-Mode Rejection at DC 100 dB
f
CM
= 60Hz, f
DATA
= 10Hz 130 dB
f
CM
= 50Hz, f
DATA
= 50Hz 120 dB
f
CM
= 60Hz, f
DATA
= 60Hz 120 dB
Normal-Mode Rejection f
SIG
= 50Hz, f
DATA
= 50Hz 100 dB
f
SIG
= 60Hz, f
DATA
= 60Hz 100 dB
Output Noise See Typical Characteristics
Power-Supply Rejection at DC, dB = –20 log(∆V
OUT
/∆V
DD
)
(2)
75 90 dB
VOLTAGE REFERENCE INPUT
Reference Input (V
REF
)V
REF
≡ (V
REF+
) – (V
REF–
) 0.1 1.25 1.3 V
Negative Reference Input (V
REF–
) AGND – 0.1 (V
REF+
) – 0.1 V
Positive Reference Input (V
REF+
)(V
REF–
) + 0.1 AV
DD
+ 0.1 V
Common-Mode Rejection at DC 120 dB
Common-Mode Rejection f
VREFCM
= 60Hz, f
DATA
= 60Hz 120 dB
Bias Current
(3)
V
REF
= 1.25V 0.65 µA
ON-CHIP VOLTAGE REFERENCE
Output Voltage REF HI = 0 1.2 1.25 1.3 V
Short-Circuit Current Source 3mA
Short-Circuit Current Sink 50 µA
Drift 15 ppm/°C
Noise V
RCAP
= 0.1µF, BW = 0.1Hz to 100Hz 10 µVrms
Output Impedance Sourcing 100µA3Ω
Startup Time 5ms
IDAC
Full-Scale Output Current R
DAC
= 75kΩ, Range = 1 0.5 mA
R
DAC
= 75kΩ, Range = 2 1 mA
R
DAC
= 75kΩ, Range = 3 2 mA
R
DAC
= 15kΩ, Range = 3 20 mA
Current Setting Resistance (R
DAC
)10kΩ
Monotonicity R
DAC
= 75kΩ 8 Bits
Compliance Voltage 0AV
DD
– 1V
Output Impedance See Typical Characteristics
PSRR V
OUT
= AV
DD
/2, Code > 16 600 ppm/V
Gain Error Individual IDAC 5 %
Gain Error Drift Individual IDAC 75 ppm/°C
Gain Error Mismatch
Between IDACs, Same Range and Code 0.25 %
Gain Error Mismatch Drift
Between IDACs, Same Range and Code 15 ppm/°C
NOTES: (1) FSR is Full-Scale Range. (2) ∆V
OUT
is change in digital result. (3) 12pF switched capacitor at f
SAMP
clock frequency.