Datasheet
ADS1217
24
SBAS260C
www.ti.com
Filter Selection—the ADS1217 uses a (sinx/x) filter or
sinc
filter. There are three different sinc filters that can be se-
lected. A fast settling filter will settle in one t
DATA
cycle. The
sinc
2
filter will settle in two cycles and have lower noise. The
sinc
3
will achieve lowest noise and higher number of effective
bits, but requires three cycles to settle. The ADS1217 will
operate with any one of these filters, or it can operate in an
auto mode, where it will first select the fast settling filter after
a new channel is selected and will then switch to sinc
2
for one
reading, followed by sinc
3
from then on.
f
DATA
—the frequency of the digital output data produced by
the ADS1217, f
DATA
is also referred to as the Data Rate.
f
f
Decimation Ratio
f
mfactor DecimationRatio
DATA
MOD OSC
=
=
•
f
MOD
—the frequency or speed at which the modulator of the
ADS1217 is running. This depends on the SPEED bit as
shown below:
DEFINITION OF TERMS
Analog Input Voltage—the voltage at any one analog input
relative to AGND.
Analog Input Differential Voltage—given by the following
equation: (A
IN+
) – (A
IN–
)
.
Thus, a positive digital output is
produced whenever the analog input differential voltage is
positive, while a negative digital output is produced whenever
the differential is negative.
For example, when the converter is configured with a 2.5V
reference and placed in a gain setting of 1, the positive
full-scale output is produced when the analog input differen-
tial is 2 • 2.5V. The negative full-scale output is produced
when the differential is 2 • (–2.5V). In each case, the actual
input voltages must remain within the AGND to AV
DD
range.
Conversion Cycle—the term
conversion cycle
usually refers
to a discrete A/D conversion operation, such as that per-
formed by a successive approximation converter. As used
here, a conversion cycle refers to the t
DATA
time period.
However, each digital output is actually based on the modu-
lator results from several t
DATA
time periods.
FILTER SETTING MODULATOR RESULTS
Fast Settling 1 t
DATA
Time Period
Sinc
2
2 t
DATA
Time Period
Sinc
3
3 t
DATA
Time Period
BITS rms BIPOLAR Vrms UNIPOLAR Vrms
24 596nV 298nV
22 2.38µV1.19µV
20 9.54µV4.77µV
18 38.1µV 19.1µV
16 153µV 76.4µV
14 610µV 305µV
12 2.44mV 1.22mV
Data Rate—the rate at which conversions are completed.
See definition for f
DATA
.
Decimation Ratio—defines the ratio between the output of
the modulator and the output Data Rate. Valid values for the
Decimation Ratio are from 20 to 2047. Larger Decimation
Ratios will have lower noise.
Effective Resolution—the effective resolution of the
ADS1217 in a particular configuration can be expressed in
two different units: bits rms (referenced to output) and Vrms
(referenced to input). Computed directly from the converter’s
output data, each is a statistical calculation. The conversion
from one to the other is shown below.
Effective number of bits
(ENOB) or
effective resolution
is
commonly used to define the usable resolution of the
A/D converter. It is calculated from empirical data taken
directly from the device. It is typically determined by applying
a fixed known signal source to the analog input and comput-
ing the standard deviation of the data sample set. The rms
noise defines the ±
σ interval about the sample mean.
The data from the A/D converter is output as codes, which
then can be easily converted to other units, such as ppm or
volts. The equations and table below show the relationship
between bits or codes, ppm, and volts.
ENOB
ppm
=
– log( )
.
20
602
SPEED BIT f
MOD
0f
OSC
/128
1f
OSC
/256
f
OSC
—the frequency of the crystal input signal at the X
IN
input
of the ADS1217.
f
SAMP
—the frequency, or switching speed, of the input sam-
pling capacitor. The value is given by one of the following
equations:
PGA SETTING SAMPLING FREQUENCY
1, 2, 4, 8
8
16
32
64, 128
f
f
mfactor
SAMP
OSC
=
f
f
mfactor
SAMP
OSC
=
2
f
f
mfactor
SAMP
OSC
=
8
f
f
mfactor
SAMP
OSC
=
16
f
f
mfactor
SAMP
OSC
=
16
4
10
602
20
V
PGA
REF
ENOB
. •
2
10
602
20
V
PGA
REF
ENOB
. •