Datasheet

ADS1217
SBAS260C
21
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WRAM Write to RAM
Description: Write up to 128 RAM locations starting at the
beginning of the RAM bank specified as part of the instruction.
The number of bytes written is RAM is one plus the value of the
second byte.
Operands: a, n
Bytes: 2
Encoding: 0110 0aaa xnnn nnnn
Data Transfer Sequence:
Write to Two RAM Locations starting from 10
H
CRAM Copy RAM Bank to Registers
Description: Copy the selected RAM Bank to the Configura-
tion Registers. This will overwrite all of the registers with the
data from the RAM bank.
Operands: a
Bytes: 1
Encoding: 1100 0aaa
Data Transfer Sequence:
Copy RAM Bank 0 to the Registers
CSRAMX Calculate RAM Bank Checksum
Description: Calculate the checksum of the selected RAM
Bank. The checksum is calculated as a sum of all the bytes with
the carry ignored. The ID,
DRDY , and DIO bits are masked so
they are not included in the checksum.
Operands: a
Bytes: 1
Encoding: 1101 0aaa
Data Transfer Sequence:
Calculate Checksum for RAM Bank 3
Calculate the Checksum
CSARAMX for all RAM Banks
Description: Calculate the checksum of all RAM Banks. The
checksum is calculated as a sum of all the bytes with the carry
ignored. The ID,
DRDY , and DIO bits are masked so they are
not included in the checksum.
Operands: None
Bytes: 1
Encoding: 1101 1000
Data Transfer Sequence:
CSRAM Calculate RAM Bank Checksum
Description: Calculate the checksum of the selected RAM
Bank. The checksum is calculated as a sum of all the bytes with
the carry ignored. All bits are included in the checksum
calculation, there is no masking of bits.
Operands: a
Bytes: 1
Encoding: 1110 0aaa
Data Transfer Sequence:
Calculate Checksum for RAM Bank 2
Calculate the Checksum
CSREG of Registers
Description: Calculate the checksum of all the registers. The
checksum is calculated as a sum of all the bytes with the carry
ignored. The ID,
DRDY and DIO bits are masked so they are
not included in the checksum.
Operands: None
Bytes: 1
Encoding: 1101 1111
Data Transfer Sequence:
0110 0001 x000 0001
Data for
10
H
Data for
11
H
D
IN
D
IN
1100 0000
D
IN
1101 0011 • • •
(1)
xxxx xxxx
D
OUT
Checksum
D
IN
1101 1000 • • •
(1)
xxxx xxxx
D
OUT
Checksum
D
IN
1101 1111 • • •
(1)
xxxx xxxx
D
OUT
Checksum
D
IN
1110 0010 • • •
(1)
xxxx xxxx
D
OUT
Checksum
NOTE: (1) For wait time, refer to timing specification.