Datasheet

ADS1217
SBAS260C
19
www.ti.com
RDATA Read Data
Description: Read a single 24-bit ADC conversion result. On
completion of read back,
DRDY
goes HIGH.
Operands: None
Bytes: 1
Encoding: 0000 0001
Data Transfer Sequence:
COMMANDS DESCRIPTION COMMAND BYTE 2ND COMMAND BYTE
RDATA Read Data 0000 0001 (01
H
)
RDATAC Read Data Continuously 0000 0011 (03
H
)
STOPC Stop Read Data Continuously 0000 1111 (0F
H
)
RREG Read from REG Bank
rrrr
0001 rrrr(1x
H
) xxxx_nnnn (# of reg-1)
RRAM Read from RAM Bank
aaa
0010 0aaa (2x
H
) xnnn_nnnn (# of bytes-1)
CREG Copy REGs to RAM Bank
aaa
0100 0aaa (4x
H
)
CREGA Copy REGS to all RAM Banks 0100 1000 (48
H
)
WREG Write to REG
rrrr
0101 rrrr(5x
H
) xxxx_nnnn (# of reg-1)
WRAM Write to RAM Bank
aaa
0110 0aaa (6x
H
) xnnn_nnnn (# of bytes-1)
CRAM Copy RAM Bank
aaa
to REG 1100 0aaa (Cx
H
)
CSRAMX Calc RAM Bank
aaa
Checksum 1101 0aaa (Dx
H
)
CSARAMX Calc all RAM Bank Checksum 1101 1000 (D8
H
)
CSREG Calc REG Checksum 1101 1111 (DF
H
)
CSRAM Calc RAM Bank
aaa
Checksum 1110 0aaa (Ex
H
)
CSARAM Calc all RAM Banks Checksum 1110 1000 (E8
H
)
SELFCAL Self Cal Offset and Gain 1111 0000 (F0
H
)
SELFOCAL Self Cal Offset 1111 0001 (F1
H
)
SELFGCAL Self Cal Gain 1111 0010 (F2
H
)
SYSOCAL Sys Cal Offset 1111 0011 (F3
H
)
SYSGCAL Sys Cal Gain 1111 0100 (F4
H
)
WAKEUP Wake Up From Sleep Mode 1111 1011 (FB
H
)
DSYNC Sync DRDY 1111 1100 (FC
H
)
SLEEP Put in Sleep Mode 1111 1101 (FD
H
)
RESET Reset to Power-Up Values 1111 1110 (FE
H
)
NOTE: (1) The data received by the A/D converter is always MSB First, the data out format is set by the BIT ORDER bit in ACR reg.
TABLE III. Command Summary.
RDATAC Read Data Continuous
Description: Read Data Continuous mode enables the con-
tinuous output of new data on each
DRDY
. This command
eliminates the need to send the Read Data Command on each
DRDY
. This mode may be terminated by either the STOP
Read Continuous command or the RESET command.
Operands: None
Bytes: 1
Encoding: 0000 0011
Data Transfer Sequence:
Command terminated when
uuuu uuuu
equals STOPC
or RESET.
NOTE: (1) For wait time, refer to timing specification.
D
IN
0000 0011
(1)
uuuu uuuu uuuu uuuu uuuu uuuu
D
OUT
D
IN
uuuu uuuu uuuu uuuu
D
OUT
MSB Mid-Byte
uuuu uuuu
LSB
DRDY
MSB Mid-Byte LSB
COMMAND DEFINITIONS
The commands listed below control the operation of the
ADS1217. Some of the commands are stand-alone com-
mands (e.g., RESET) while others require additional bytes
(e.g., WREG requires command, count, and the data bytes).
Commands that output data require a minimum of four f
OSC
cycles before the data is ready (e.g., RDATA).
Operands:
n = count (0 to 127)
r = register (0 to 15)
x = dont care
a = RAM bank address (0 to 7)
D
IN
0000 0001
(1)
xxxx xxxx xxxx xxxx xxxx xxxx
D
OUT
MSB Mid-Byte LSB
DRDY