Datasheet

ADS1217
SBAS260C
17
www.ti.com
ACR (Address 02
H
) Analog Control Register
Reset Value = 00
H
bit 7 BOCS: Burnout Current Source
0 = Disabled (default)
1 = Enabled
IDAC Current =
V
R
DAC Code
REF
DAC
RANGE
8
2
1






( )
( )
−
bit 6-5 IDAC2R1: IDAC2R0: Full-Scale Range Select for
IDAC2
00 = Off (default)
01 = Range 1
10 = Range 2
11 = Range 3
bit 4-3 IDAC1R1: IDAC1R0: Full-Scale Range Select for
IDAC1
00 = Off (default)
01 = Range 1
10 = Range 2
11 = Range 3
bit 2-0 PGA2: PGA1: PGA0: Programmable Gain Amplifier
Gain Selection
000 = 1 (default)
001 = 2
010 = 4
011 = 8
100 = 16
101 = 32
110 = 64
111 = 128
IDAC1 (Address 03
H
) Current DAC 1
Reset Value = 00
H
The DAC code bits set the output of DAC1 from 0 to full-
scale. The value of the full-scale current is set by this Byte,
V
REF
, R
DAC
, and the DAC1 range bits in the ACR register.
IDAC2 (Address 04
H
) Current DAC 2
Reset Value = 00
H
The DAC code bits set the output of DAC2 from 0 to full-
scale. The value of the full-scale current is set by this Byte,
V
REF
, R
DAC
, and the DAC2 range bits in the ACR register.
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
BOCS IDAC2R1 IDAC2R0 IDAC1R1 IDAC1R0 PGA2 PGA1 PGA0
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
IDAC1_7 IDAC1_6 IDAC1_5 IDAC1_4 IDAC1_3 IDAC1_2 IDAC1_1 IDAC1_0
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
IDAC2_7 IDAC2_6 IDAC2_5 IDAC2_4 IDAC1_3 IDAC1_2 IDAC1_1 IDAC1_0
ODAC (Address 05
H
) Offset DAC Setting
Reset Value = 00
H
bit 7 Offset Sign
0 = Positive
1 = Negative
bit 6-0 Offset =
V
PGA
Code
REF
•






127
NOTE: The offset must be used after calibration or the
calibration will notify the effects.
DIO (Address 06
H
) Digital I/O
Reset Value = 00
H
A value written to this register will appear on the digital
I/O pins if the pin is configured as an output in the DIR
register. Reading this register will return the value of the
digital I/O pins.
DIR (Address 07
H
) Direction control for digital I/O
Reset Value = FF
H
Each bit controls whether the Digital I/O pin is an output
(= 0) or input (= 1). The default power-up state is as inputs.
DEC0 (Address 08
H
) Decimation Register
(Least Significant 8 bits)
Reset Value = 80
H
The decimation value is defined with 11 bits for a range of 20
to 2047. This register is the least significant 8 bits. The 3
most significant bits are contained in the M/DEC1 register.
The default data rate is 10Hz with a 2.4576MHz crystal.
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
SIGN OSET6 OSET5 OSET4 OSET3 OSET2 OSET1 OSET0
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
DIR7 DIR6 DIR5 DIR4 DIR3 DIR2 DIR1 DIR0
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
DEC07 DEC06 DEC05 DEC04 DEC03 DEC02 DEC01 DEC00
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
DIO7 DIO6 DIO5 DIO4 DIO3 DIO2 DIO1 DIO0