Datasheet

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DIGITAL CHARACTERISTICS: T
MIN
to T
MAX
, DV
DD
+2.7V to +5.25V
FUNCTIONAL BLOCK DIAGRAM
BUF PGA
A=1:128
+
1.25Vor
2.5V
Reference
ClockGenerator
Registers
SerialInterface
2nd-Order
Modulator
RAM
DigitalI/O
Interface
AGND AV
DD
IN+
IN-
R
DAC
V
REFOUT
V
RCAP
V
REF+
V
REF-
X
IN
X
OUT
DSYNCPDWN RESET DRDYD7BUFENDGNDDV
DD
...D0
SCLK
POL
D
IN
D
OUT
CS
MUX
A 0
IN
A 1
IN
A 2
IN
A 3
IN
A 4
IN
A 5
IN
A 6
IN
A 7
IN
A
INCOM
IDAC1
Controller
Programmable
Digital
Filter
8-Bit
IDAC
IDAC2
8-Bit
IDAC
Offset
DAC
AV
DD
AGND
2 Am
2 Am
ADS1216
SBAS171D – NOVEMBER 2000 – REVISED SEPTEMBER 2006
ADS1216
PARAMETER CONDITIONS MIN TYP MAX UNIT
Digital input/output
Logic family CMOS
Logic level: V
IH
0.8 × DV
DD
DV
DD
V
Logic level: V
IL
DGND 0.2 × DV
DD
V
Logic level: V
OH
I
OH
= 1mA DV
DD
– 0.4 V
Logic level: V
OL
I
OL
= 1mA DGND DGND + 0.4 V
Input leakage: I
IH
V
I
= DV
DD
10 µ A
Input leakage: I
IL
V
I
= 0 –10 µ A
Master clock rate: f
OSC
1 5 MHz
Master clock period: t
OSC
1/f
OSC
200 1000 ns
7
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