Datasheet

www.ti.com

COMMAND DEFINITIONS

ADS1216

SBAS171D – NOVEMBER 2000 – REVISED SEPTEMBER 2006

The commands summarized in Table 4 control the operation of the ADS1216. All of the commands are

stand-alone except for the register reads and writes (RREG, WREG) which require a second command byte

plus data. Additional command and data bytes may be shifted in without delay after the first command byte. The

ORDER bit in the STATUS register (see the Register map section) sets the order of the bits within the output

data. CS must stay low during the entire command sequence.

Table 4. Command Definitions

(1)

COMMAND DESCRIPTION 1ST COMMAND BYTE 2ND COMMAND BYTE

WAKEUP Completes SYNC and exits standby mode 0000 0000 (00h)

RDATA Read data 0000 0001 (01h)

RDATAC Read data continuously 0000 0011 (03h)

SDATAC Stop read data continuously 0000 1111 (0Fh)

RREG Read from REG rrr 0001 rrrr (1xh) 0000 nnnn

RRAM Read from RAM bank aaa 0010 0 aaa (2xh) x nnn nnnn (number of bytes – 1)

CREG Copy REG to RAM bank aaa 0100 0 aaa (4xh)

CREGA Copy REG to all RAM banks 0100 1000 (48h)

WREG Write to REG rrr 0101 rrrr (5xh) 0000 nnnn

WRAM Write to RAM bank aaa 0110 0 aaa (6xh) x nnn nnnn (number of bytes – 1)

CRAM Copy RAM bank aaa to REG 1100 0 aaa (Cxh)

CSRAMX Calculate RAM bank aaa checksum 1101 0 aaa (Dxh)

CSARAMX Calculate all RAM banks checksum 1101 1000 (D8h)

CSREG Calculate REG checksum 1101 1111 (DFh)

CSRAM Calculate RAM bank aaa checksum 1110 0 aaa (Exh)

CSARAM Calculate all RAM banks checksum 1110 1000 (E8h)

SELFCAL Offset and gain self-calibration 1111 0000 (F0h)

SELFOCAL Offset self-calibration 1111 0001 (F1h)

SELFGCAL Gain self-calibration 1111 0010 (F2h)

SYSOCAL System offset calibration 1111 0011 (F3h)

SYSGCAL System gain calibration 1111 0100 (F4h)

DSYNC Synchronize the A/D conversion 1111 1100 (FCh)

SLEEP Begin sleep mode 1111 1101 (FDh)

RESET Reset to power-up values 1111 1110 (FEh)

WAKEUP Completes SYNC and exits standby mode 1111 1111 (FFh)

(1) n = number of registers to be read/written – 1. For example, to read/write three registers, set nnnn = 2 (0010). r = starting register

address for read/write commands.

Submit Documentation Feedback