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ADS1216

SBAS171D – NOVEMBER 2000 – REVISED SEPTEMBER 2006

DEC0 (Address 08h) Decimation Register (least significant 8 bits)

Reset value = 80h.

bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0

DEC07 DEC06 DEC05 DEC04 DEC03 DEC02 DEC01 DEC00

The decimation value is defined with 11 bits for a range of 20 to 2047. This register is the least significant eight bits. The three most

significant bits are contained in the M/DEC1 register.

M/DEC1 (Address 09h) Mode and Decimation Register

Reset value = 07h.

bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0

DRDY U/ B SMODE1 SMODE0 Reserved DEC10 DEC09 DEC08

bit 7 DRDY: Data ready (read-only)

This bit duplicates the state of the DRDY pin.

bit 6 U/ B: Data format

0 = Bipolar

1 = Unipolar

U/ B ANALOG INPUT DIGITAL OUTPUT

0 +FS 0x7FFFFF

Zero 0x000000

–FS 0x800000

1 +FS 0xFFFFFF

Zero 0x000000

–FS 0x000000

bits 5-4 SMODE1: SMODE0: Settling mode

00 = Auto

01 = Fast-Settling filter

10 = Sinc

filter

11 = Sinc

filter

bit 3 Reserved

This bit is not used in the ADS1216 and it is recommended that it be set to 0.

bits 2-0 DEC10: DEC09: DEC08: Most significant bits of the decimation value

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