Datasheet

ADS1209
SBAS491 –FEBRUARY 2010 www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
Over operating ambient temperature range of –40°C to +105°C, AVDD = 5V, BVDD = 3V, CHx+ = 0.2V to 4.8V, CHx– =
2.5V, V
REFIN
= V
REFOUT
= 2.5V (internal), CLKIN = 20MHz, and 16-bit Sinc
3
filter with OSR = 256, unless otherwise noted.
ADS1209
PARAMETER TEST CONDITIONS MIN TYP
(1)
MAX UNIT
SAMPLING DYNAMICS
CLKSEL = 1, –40°C ≤ T
A
≤ +85°C 8 10 12 MHz
f
CLK
Internal clock frequency
CLKSEL = 1,
7.8 10 12 MHz
–40°C ≤ T
A
≤ +105°C
f
CLKIN
External clock frequency CLKSEL = 0 1 20 24 MHz
AC ACCURACY
THD Total harmonic distortion V
IN
= ±2.3V
PP
at 5kHz –85 –80 dB
SFDR Spurious-free dynamic range V
IN
= ±2.3V
PP
at 5kHz 82 86 dB
V
IN
= ±2.3V
PP
at 5kHz 86 90 dB
SNR Signal-to-noise ratio
V
IN
= ±2.0V
PP
at 5kHz 85 89 dB
SINAD Signal-to-noise + distortion V
IN
= ±2.3V
PP
at 5kHz 80 84 dB
Channel-to-channel isolation V
IN
= ±2.3V
PP
at 5kHz 100 dB
REFERENCE VOLTAGE OUTPUT
V
REFOUT
Reference output voltage 2.450 2.5 2.550 V
TCV
REFOUT
Reference output voltage drift ±20 ppm/°C
f = 0.1Hz to 10Hz, C
L
= 10mF 10 mV
RMS
Output voltage noise
f = 10Hz to 10kHz, C
L
= 10mF 12 mV
RMS
I
REFOUT
Output current 10 mA
I
REFSC
Short-circuit current 0.5 mA
Turn-on settling time To accuracy level of 0.1%, no load 100 ms
REFERENCE VOLTAGE INPUT
V
REFIN
Input voltage 0.5 2.5 2.6 V
R
REFIN
Input resistance 100 MΩ
C
REFIN
Input capacitance 5 pF
I
REFIN
Input current 1 mA
DIGITAL INPUTS
Logic family CMOS with Schmitt Trigger
V
IH
High-level input voltage 0.7 × BVDD BVDD + 0.3 V
V
IL
Low-level input voltage –0.3 0.3 × BVDD V
I
IN
Input current V
IN
= BVDD or BGND ±50 nA
C
I
Input capacitance 5 pF
DIGITAL OUTPUTS
Logic family CMOS
V
OH
High-level output voltage BVDD = 4.5V, I
OH
= –100mA 4.44 V
V
OL
Low-level output voltage BVDD = 4.5V, I
OL
= +100mA 0.5 V
C
O
Output capacitance 5 pF
C
L
Load capacitance 30 pF
Data format Bit stream
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