Datasheet
SNR=1.76dB+6.02dB ENOB´
H(z)=
1 z-
-OSR
1 z-
-1
(1+z )
- ´2
OSR
2
16
14
12
10
8
6
4
2
0
ENOB(Bits)
10
1000
OSR
100
Sinc
2
Sinc
3
0 2 6 84 10
Settling Time(ms)
ENOB(Bits)
10
9
8
7
6
5
4
3
2
1
0
Sincfast
Sinc
3
Sinc
Sinc
2
ADS1209
SBAS491 –FEBRUARY 2010
www.ti.com
The effective number of bits (ENOB) can be used to the modulator clock divided by the OSR. For
compare the performance of A/D converters and ΔΣ overcurrent protection, filter types other than Sinc
3
modulators. Figure 27 shows the ENOB of the may be a better choice. A simple example is a Sinc
2
ADS1209 with different filter types. In this data sheet, filter. The Sincfast is a modified Sinc
2
filter as
the ENOB is calculated from the SNR as shown in Equation 4 shows:
Equation 3:
(3)
(4)
Figure 28 compares the settling time of different filter
types operating with a 10MHz modulator clock.
Figure 27. Measured ENOB vs OSR
In motor-control applications, a very fast response
time is required for overcurrent detection. There is a
Figure 28. Measured ENOB vs Settling Time
constraint between 1ms and 5ms with 3 bits to 7 bits
of resolution. The time for full settling depends on the
filter order. Therefore, the full settling of the Sinc
3
For more information, see application note SBAA094,
filter requires three data clocks and the Sinc
2
filter Combining the ADS1202 with an FPGA Digital Filter
requires two data clocks. The data clock is equal to for Current Measurement in Motor Control
Applications, available for download at www.ti.com.
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