Datasheet

Power Supplies

www.ti.com

4 Power Supplies

J2 provides access to the +5 VA for the AV

supply, and +2.7 to 5.5 VD for the +BV

supply. It is

recommended that all power to the board be sourced from a well-regulated linear supply with

current-limiting capabilities. Power is to be applied through J2. Table 1 describes the pinout for J2.

Table 1. J2: Power Supply and Digital Outputs

Signal Pin Number Signal

Ground 1 2 Not used

2.7 to 5.5 +BV

Supply 3 4 +5 AV

Supply

Ground 5 6 Clock OUT 2

Clock OUT 1 7 8 Modulator Data: CHB

Modulator Data: CHA 9

For standalone operation, power sources can also be applied via a mating connector to J2, and the digital

output data streams can be wired directly to an FPGA or other digital filter module for further processing.

Refer to Figure 2 or the schematic appended to the end of this document for additional details.

5 EVM Operation

This section describes the general operation of the ADS1209EVM.

5.1 Analog Inputs: J1

The analog input to the ADS1209EVM printed circuit board (PCB) can be applied directly to J1, pins 1 and

2 for channel A and J1, pins 4 and 5 for channel B.

CAUTION

Carefully review the ADS1209 product data sheet for the limitations of the

analog input range, and ensure that the appropriate analog/digital voltages are

applied before connecting any analog input to the EVM.

Table 2 lists the details of J1.

Table 2. J1: Analog Inputs

Pin Number Signal Description

J1.1 CHA+ Noninverting analog input to channel A

J1.2 CHA– Inverting input to channel A

J1.3 GND Ground

J1.4 CHB– Inverting input to channel B

J1.5 CHB+ Noninverting input to channel B

ADS1209EVM SBAU167–March 2010

Submit Documentation Feedback